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eba7aec49d
Speedy is a serial communication bus that is typically used in Exynos SoC devices for communicating with a PMIC. Implement basic support for it, as well as add its first user - s2mps17 in board-dreamlte. Also, while at it, implement a simple readl function. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
156 lines
3.2 KiB
C
156 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2022, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
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*/
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#include <board.h>
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#include <stdint.h>
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#include <string.h>
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#include <drivers/framework.h>
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#include <lib/simplefb.h>
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#include <lib/debug.h>
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#include <soc/exynos8895.h>
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#include <drivers/samsung/exynos-speedy.h>
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/* DECON Register MAP */
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#define HW_SW_TRIG_CONTROL 0x70
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/* MMIO MAP */
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#define DECON_F_BASE 0x12860000
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#define SPEEDY_BASE 0x15b50000
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void init_board_funcs(void *board)
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{
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/*
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* Parsing the struct directly without restructing is
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* broken as of Sep 29 2024
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*/
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struct {
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const char *name;
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int ops[BOARD_OP_EXIT];
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} *board_restruct = board;
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board_restruct->name = "DREAMLTE";
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}
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enum s2mps17_ldos {
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S2MPS17_LDO2,
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S2MPS17_LDO34,
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S2MPS17_LDO35,
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S2MPS17_END
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};
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struct s2mps17_data {
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uint8_t ldo_ctrl_value;
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uint32_t ldo_voltage_value;
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};
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/* Slave addr = 0xCC */
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/* S2MPS17 Register MAP */
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#define S2MPS17_PMIC_REG_L2CTRL 0x3e
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#define S2MPS17_PMIC_REG_L34CTRL 0x5f
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#define S2MPS17_PMIC_REG_L35CTRL 0x60
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#define S2MPS17_BUCK_MIN1 300000
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#define S2MPS17_BUCK_MIN2 600000
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#define S2MPS17_LDO_MIN1 700000
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#define S2MPS17_LDO_MIN2 400000
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#define S2MPS17_LDO_MIN3 1800000
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#define S2MPS17_LDO_MIN4 300000
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#define S2MPS17_LDO_STEP1 12500
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#define S2MPS17_LDO_STEP2 25000
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#define S2MPS17_LDO_VSEL_MASK 0x3f
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#define S2MPS17_BUCK_VSEL_MASK 0xff
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#define S2MPS17_ENABLE_MASK (3 << 6)
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#define S2MPS17_LDO2_VOLTAGE 2800000
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#define S2MPS17_LDO34_VOLTAGE 1850000
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#define S2MPS17_LDO35_VOLTAGE 3000000
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#define _LDO(macro) S2MPS17_LDO##macro
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#define _REG(ctrl) S2MPS17_PMIC_REG##ctrl
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#define _ldo_ops(num) s2mps17_ldo_ops##num
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#define _TIME(macro) S2MPS17_ENABLE_TIME##macro
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static void s2mps17_setup(void)
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{
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int ret;
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struct speedy_transaction s2mps17;
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/* S2MPS17 configuration */
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s2mps17.base = SPEEDY_BASE;
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s2mps17.slave = 1;
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/*
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* Define LDO control register values
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* Calculation formula: enable mask + (voltage to set - minimal voltage) / step value
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*/
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const struct s2mps17_data data[] = {
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{
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S2MPS17_PMIC_REG_L2CTRL, // vqmmc
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S2MPS17_ENABLE_MASK + (S2MPS17_LDO2_VOLTAGE -
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S2MPS17_LDO_MIN3) / S2MPS17_LDO_STEP2
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}, {
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S2MPS17_PMIC_REG_L34CTRL, // tsp_io
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S2MPS17_ENABLE_MASK + (S2MPS17_LDO34_VOLTAGE -
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S2MPS17_LDO_MIN1) / S2MPS17_LDO_STEP2
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}, {
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S2MPS17_PMIC_REG_L35CTRL, // tsp_avdd
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S2MPS17_ENABLE_MASK + (S2MPS17_LDO35_VOLTAGE -
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S2MPS17_LDO_MIN3) / S2MPS17_LDO_STEP2
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}
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};
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/* Go ahead and enable the LDOs */
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for (int i = 0; i < S2MPS17_END; i++) {
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s2mps17.offset = data[i].ldo_ctrl_value;
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s2mps17.val = data[i].ldo_voltage_value;
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ret = speedy_write(&s2mps17);
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if (ret)
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goto handle_err;
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}
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return;
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handle_err:
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printk(KERN_ERR, "s2mps17: err\n");
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return;
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}
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// Early initialization
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int board_init(void)
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{
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/* Allow framebuffer to be written to */
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*(int*) (DECON_F_BASE + HW_SW_TRIG_CONTROL) = 0x1281;
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return 0;
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}
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// Late initialization
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int board_late_init(void)
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{
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s2mps17_setup();
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return 0;
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}
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int board_driver_setup(void)
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{
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struct {
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int width;
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int height;
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int stride;
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void *address;
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} simplefb_data = {
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.width = 1440,
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.height = 2960,
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.stride = 4,
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.address = (void *)0xcc000000
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};
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REGISTER_DRIVER("simplefb", simplefb_probe, &simplefb_data);
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return 0;
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}
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