The i.MX6DP and i.MX6QP incorporate NoC interconnect logic which needs to be configured in order to use external DDR memory. This patch enables the SPL to configure the necessary registers in accordance with the NXP engineering bulletin EB828. Co-developed-by: Filip Brozović <fbrozovic@gmail.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
12 KiB
12 KiB