1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
84 lines
1.9 KiB
C
84 lines
1.9 KiB
C
/*
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* Generic bounce buffer implementation
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <errno.h>
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#include <bouncebuf.h>
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static int addr_aligned(struct bounce_buffer *state)
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{
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const ulong align_mask = ARCH_DMA_MINALIGN - 1;
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/* Check if start is aligned */
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if ((ulong)state->user_buffer & align_mask) {
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debug("Unaligned buffer address %p\n", state->user_buffer);
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return 0;
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}
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/* Check if length is aligned */
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if (state->len != state->len_aligned) {
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debug("Unaligned buffer length %d\n", state->len);
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return 0;
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}
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/* Aligned */
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return 1;
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}
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int bounce_buffer_start(struct bounce_buffer *state, void *data,
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size_t len, unsigned int flags)
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{
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state->user_buffer = data;
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state->bounce_buffer = data;
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state->len = len;
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state->len_aligned = roundup(len, ARCH_DMA_MINALIGN);
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state->flags = flags;
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if (!addr_aligned(state)) {
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state->bounce_buffer = memalign(ARCH_DMA_MINALIGN,
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state->len_aligned);
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if (!state->bounce_buffer)
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return -ENOMEM;
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if (state->flags & GEN_BB_READ)
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memcpy(state->bounce_buffer, state->user_buffer,
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state->len);
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}
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/*
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* Flush data to RAM so DMA reads can pick it up,
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* and any CPU writebacks don't race with DMA writes
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*/
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flush_dcache_range((unsigned long)state->bounce_buffer,
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(unsigned long)(state->bounce_buffer) +
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state->len_aligned);
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return 0;
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}
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int bounce_buffer_stop(struct bounce_buffer *state)
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{
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if (state->flags & GEN_BB_WRITE) {
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/* Invalidate cache so that CPU can see any newly DMA'd data */
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invalidate_dcache_range((unsigned long)state->bounce_buffer,
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(unsigned long)(state->bounce_buffer) +
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state->len_aligned);
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}
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if (state->bounce_buffer == state->user_buffer)
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return 0;
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if (state->flags & GEN_BB_WRITE)
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memcpy(state->user_buffer, state->bounce_buffer, state->len);
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free(state->bounce_buffer);
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return 0;
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}
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