95a1feca2e
The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as SRAM by locking ways. These functions will be used to transfer the trampoline code for SMP into the locked SRAM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
18 lines
457 B
C
18 lines
457 B
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CACHE_UNIPHIER_H
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#define __CACHE_UNIPHIER_H
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#include <linux/types.h>
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void uniphier_cache_prefetch_range(u32 start, u32 end, u32 ways);
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void uniphier_cache_touch_range(u32 start, u32 end, u32 ways);
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void uniphier_cache_touch_zero_range(u32 start, u32 end, u32 ways);
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#endif /* __CACHE_UNIPHIER_H */
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