c2ae7d8220
Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
30 lines
576 B
Plaintext
30 lines
576 B
Plaintext
CONFIG_PPC=y
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1_P2_RDB_PC=y
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CONFIG_PHYS_64BIT=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
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CONFIG_BOOTDELAY=10
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CONFIG_SPL=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_NETDEVICES=y
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CONFIG_E1000=y
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CONFIG_SYS_NS16550=y
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CONFIG_FSL_ESPI=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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