c2ae7d8220
Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
21 lines
574 B
Plaintext
21 lines
574 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_MACH_SUN7I=y
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CONFIG_DRAM_CLK=432
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CONFIG_MMC0_CD_PIN="PH10"
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CONFIG_MMC3_CD_PIN="PH11"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=3
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CONFIG_USB1_VBUS_PIN="PH26"
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CONFIG_USB2_VBUS_PIN="PH22"
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CONFIG_VIDEO_COMPOSITE=y
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CONFIG_GMAC_TX_DELAY=3
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CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI"
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_USB_EHCI_HCD=y
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