0fc5c499db
Resync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
112 lines
3.0 KiB
Plaintext
112 lines
3.0 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
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# CONFIG_SPL_SYS_THUMB_BUILD is not set
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# CONFIG_TPL_SYS_THUMB_BUILD is not set
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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# CONFIG_SPL_USE_ARCH_MEMSET is not set
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x60408000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808"
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CONFIG_SPL_TEXT_BASE=0x60000000
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CONFIG_ROCKCHIP_RK3066=y
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# CONFIG_ROCKCHIP_STIMER is not set
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CONFIG_TPL_TEXT_BASE=0x10080C04
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CONFIG_TPL_STACK=0x1008FFFF
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CONFIG_TARGET_MK808=y
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CONFIG_SPL_STACK_R_ADDR=0x70000000
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CONFIG_DEBUG_UART_BASE=0x20064000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_FS_FAT=y
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CONFIG_SYS_LOAD_ADDR=0x70800800
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CONFIG_TPL_MAX_SIZE=0x7ffc
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CONFIG_SPL_PAYLOAD="u-boot.bin"
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CONFIG_DEBUG_UART=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000
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CONFIG_SD_BOOT=y
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CONFIG_USE_PREBOOT=y
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CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_SPL_MAX_SIZE=0x32000
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_NO_BSS_LIMIT=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK=0x1008ffff
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_FS_EXT4=y
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CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2
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CONFIG_TPL_NEEDS_SEPARATE_STACK=y
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=276
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# CONFIG_BOOTM_PLAN9 is not set
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# CONFIG_BOOTM_RTEMS is not set
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# CONFIG_BOOTM_VXWORKS is not set
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_TPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_OF_DTB_PROPS_REMOVE=y
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_TPL_OF_PLATDATA=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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# CONFIG_NET is not set
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CONFIG_TPL_DM=y
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# CONFIG_DM_WARN is not set
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_TPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_TPL_SYSCON=y
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# CONFIG_SIMPLE_BUS is not set
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# CONFIG_SPL_SIMPLE_BUS is not set
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# CONFIG_TPL_BLK is not set
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_TPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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# CONFIG_SPL_DM_I2C is not set
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_SPL_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_SPL_MMC_UHS_SUPPORT=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_PINCTRL=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_TPL_RAM=y
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CONFIG_DM_RESET=y
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_ROCKCHIP_SERIAL=y
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CONFIG_SYSRESET=y
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CONFIG_TIMER=y
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CONFIG_SPL_TIMER=y
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CONFIG_TPL_TIMER=y
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CONFIG_DESIGNWARE_APB_TIMER=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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# CONFIG_TPL_OF_LIBFDT is not set
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