bf4b3de101
This commit adjusts some files to use Kbuild.include.
- Use cc-option defined in Kbuild.include
(Delete cc-option in config.mk)
- Use cc-version defined in
(Delete cc-version in config.mk)
- Move binutils-version and dtc-version to Kbuild.include
by analogy to cc-version
This commit also adds srctree (same as SRCTREE)
to use Kbuild scripts.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
111 lines
2.9 KiB
Makefile
111 lines
2.9 KiB
Makefile
# our default target
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.PHONY: all
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all:
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include $(srctree)/scripts/Kbuild.include
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include $(TOPDIR)/config.mk
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# variable LIB is used in examples/standalone/Makefile
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__LIB := $(obj)built-in.o
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LIBGCC = $(obj)libgcc.o
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SRCS :=
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subdir-y :=
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obj-dirs :=
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include Makefile
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# Do not include host rules unless needed
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ifneq ($(hostprogs-y)$(hostprogs-m),)
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include $(SRCTREE)/scripts/Makefile.host.tmp
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endif
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# Going forward use the following
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obj-y := $(sort $(obj-y))
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extra-y := $(sort $(extra-y))
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always := $(sort $(always))
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lib-y := $(sort $(lib-y))
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subdir-y += $(patsubst %/,%,$(filter %/, $(obj-y)))
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obj-y := $(patsubst %/, %/built-in.o, $(obj-y))
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subdir-obj-y := $(filter %/built-in.o, $(obj-y))
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subdir-obj-y := $(addprefix $(obj),$(subdir-obj-y))
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SRCS += $(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
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$(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S))
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OBJS := $(addprefix $(obj),$(obj-y))
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# $(obj-dirs) is a list of directories that contain object files
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obj-dirs += $(dir $(OBJS))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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LGOBJS := $(addprefix $(obj),$(sort $(lib-y)))
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all: $(__LIB) $(addprefix $(obj),$(extra-y) $(always)) $(subdir-y)
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$(__LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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ifneq ($(strip $(lib-y)),)
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all: $(LIBGCC)
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$(LIBGCC): $(obj).depend $(LGOBJS)
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$(call cmd_link_o_target, $(LGOBJS))
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endif
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ifneq ($(subdir-obj-y),)
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# Descending
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$(subdir-obj-y): $(subdir-y)
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endif
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ifneq ($(subdir-y),)
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$(subdir-y): FORCE
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$(MAKE) -C $@ -f $(TOPDIR)/scripts/Makefile.build
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endif
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#########################################################################
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# Allow boards to use custom optimize flags on a per dir/file basis
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ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR))
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ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR))
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EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR))
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ALL_CFLAGS += $(EXTRA_CPPFLAGS)
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# The _DEP version uses the $< file target (for dependency generation)
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# See rules.mk
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EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
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$(CPPFLAGS_$(BCURDIR))
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$(obj)%.s: %.S
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$(CPP) $(ALL_AFLAGS) -o $@ $<
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$(obj)%.o: %.S
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$(CC) $(ALL_AFLAGS) -o $@ $< -c
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$(obj)%.o: %.c
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ifneq ($(CHECKSRC),0)
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$(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
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endif
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$(CC) $(ALL_CFLAGS) -o $@ $< -c
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$(obj)%.i: %.c
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$(CPP) $(ALL_CFLAGS) -o $@ $< -c
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$(obj)%.s: %.c
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$(CC) $(ALL_CFLAGS) -o $@ $< -c -S
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# If the list of objects to link is empty, just create an empty built-in.o
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cmd_link_o_target = $(if $(strip $1),\
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$(LD) $(LDFLAGS) -r -o $@ $1,\
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rm -f $@; $(AR) rcs $@ )
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#########################################################################
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# defines $(obj).depend target
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include $(TOPDIR)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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.PHONY: FORCE
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