f832d8a143
fix support for Logic SDK-LH7A404 board and clean up the LH7A404 register macros. * Patch by Matthew McClintock, 10 Jun 2004: Modify code to select correct serial clock on Sandpoint8245
76 lines
2.4 KiB
C
76 lines
2.4 KiB
C
/*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* lh7a400 SoC interface
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*/
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#ifndef __LH7A400_H__
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#define __LH7A400_H__
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#include "lh7a40x.h"
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/* Interrupt Controller (userguide 8.2.1) */
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typedef struct {
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volatile u32 intsr;
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volatile u32 intrsr;
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volatile u32 intens;
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volatile u32 intenc;
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volatile u32 rsvd1;
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volatile u32 rsvd2;
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volatile u32 rsvd3;
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} /*__attribute__((__packed__))*/ lh7a400_interrupt_t;
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#define LH7A400_INTERRUPT_BASE (0x80000500)
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#define LH7A400_INTERRUPT_PTR ((lh7a400_interrupt_t*) LH7A400_INTERRUPT_BASE)
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/* (DMA) Direct Memory Access Controller (userguide 9.2.1) */
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typedef struct {
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lh7a40x_dmachan_t chan[15];
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volatile u32 glblint;
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volatile u32 rsvd1;
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volatile u32 rsvd2;
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volatile u32 rsvd3;
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} /*__attribute__((__packed__))*/ lh7a400_dma_t;
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#define LH7A400_DMA_BASE (0x80002800)
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#define DMA_USBTX_OFFSET (0x000)
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#define DMA_USBRX_OFFSET (0x040)
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#define DMA_MMCTX_OFFSET (0x080)
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#define DMA_MMCRX_OFFSET (0x0C0)
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#define DMA_AC97_BASE (0x80002A00)
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#define LH7A400_DMA_PTR ((lh7a400_dma_t*) LH7A400_DMA_BASE)
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#define LH7A400_DMA_USBTX \
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((lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_USBTX_OFFSET))
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#define LH7A400_DMA_USBRX \
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((lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_USBRX_OFFSET))
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#define LH7A400_DMA_MMCTX \
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((lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_MMCTX_OFFSET))
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#define LH7A400_DMA_MMCRX \
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((lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_MMCRX_OFFSET))
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#define LH7A400_AC97RX(n) \
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((lh7a400_dmachan_t*) (LH7A400_AC97_BASE + \
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((2*n) * sizeof(lh7a400_dmachan_t))))
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#define LH7A400_AC97TX(n) \
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((lh7a400_dmachan_t*) (LH7A400_AC97_BASE + \
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(((2*n)+1) * sizeof(lh7a400_dmachan_t))))
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#endif /* __LH7A400_H__ */
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