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a3ab2ae7f6
u-boot/arch/mips/lib
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Daniel Schwierzeck a3ab2ae7f6 MIPS: sync processor and register definitions with linux-4.4 
Update definitions for processor, registers as well as assemby
macros.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16 21:06:46 +01:00
..
ashldi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
ashrdi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
bootm.c MIPS: bootm: use CONFIG_IS_ENABLED() everywhere 2015-11-06 13:27:28 +01:00
cache_init.S MIPS: sync processor and register definitions with linux-4.4 2016-01-16 21:06:46 +01:00
cache.c MIPS: sync processor and register definitions with linux-4.4 2016-01-16 21:06:46 +01:00
io.c MIPS: move mips_io_port_base out of board.c 2014-04-20 13:16:42 +02:00
libgcc.h dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
lshrdi3.c dm: mips: Import libgcc components from Linux 2012-08-17 20:13:48 +02:00
Makefile MIPS: unify cache initialization code 2015-01-29 12:55:01 +01:00