u-boot/drivers/ddr
Thor Thayer 8097aee3ab ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access
The ECC registers in the SDRAM HMC Adapter should always
be accessible (both when ECC is enabled and disabled).
Currently, the registers are accessible only when ECC is enabled.

The ECC Enabled bit is used to determine the status of
ECC by later OSes so always allow access.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07 14:38:34 +01:00
..
altera ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access 2020-01-07 14:38:34 +01:00
fsl mpc85xx: ddr: Always start DDR RAM in Self Refresh mode 2019-12-23 14:07:55 +05:30
imx imx8m: ddr_init: Move ddr_init() messages to debug level 2019-12-27 12:14:25 +01:00
marvell arm: mvebu: Add Marvell's integrated CPUs 2019-04-12 07:04:18 +02:00
microchip SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00