7b3b74d321
Enable uart overrun feature which allows to benefits of uart FIFO usage. Previously overrun management was disabled, this has to effect to bypassed the uart FIFO usage even if FIFO was enabled. In particular configuration, for example when video console is enabled, copy/pasting a long command line in console results in corruption. This is due to the fact that a lot of time is consumed in flushing the cache during frame buffer update, so uart chars are not read fast enough. By using uart FIFO and managing overrun, long command line can by copy/paste in console without being corrupted. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
165 lines
4.2 KiB
C
165 lines
4.2 KiB
C
/*
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <asm/arch/stm32.h>
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#include "serial_stm32.h"
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static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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bool stm32f4 = plat->uart_info->stm32f4;
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fdt_addr_t base = plat->base;
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u32 int_div, mantissa, fraction, oversampling;
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int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
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if (int_div < 16) {
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oversampling = 8;
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setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
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} else {
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oversampling = 16;
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clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
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}
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mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
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fraction = int_div % oversampling;
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writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
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return 0;
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}
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static int stm32_serial_getc(struct udevice *dev)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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bool stm32f4 = plat->uart_info->stm32f4;
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fdt_addr_t base = plat->base;
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u32 isr = readl(base + ISR_OFFSET(stm32f4));
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if ((isr & USART_SR_FLAG_RXNE) == 0)
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return -EAGAIN;
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if (isr & USART_SR_FLAG_ORE) {
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if (!stm32f4)
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setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
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else
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readl(base + RDR_OFFSET(stm32f4));
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return -EIO;
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}
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return readl(base + RDR_OFFSET(stm32f4));
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}
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static int stm32_serial_putc(struct udevice *dev, const char c)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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bool stm32f4 = plat->uart_info->stm32f4;
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fdt_addr_t base = plat->base;
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if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
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return -EAGAIN;
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writel(c, base + TDR_OFFSET(stm32f4));
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return 0;
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}
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static int stm32_serial_pending(struct udevice *dev, bool input)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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bool stm32f4 = plat->uart_info->stm32f4;
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fdt_addr_t base = plat->base;
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if (input)
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return readl(base + ISR_OFFSET(stm32f4)) &
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USART_SR_FLAG_RXNE ? 1 : 0;
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else
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return readl(base + ISR_OFFSET(stm32f4)) &
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USART_SR_FLAG_TXE ? 0 : 1;
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}
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static int stm32_serial_probe(struct udevice *dev)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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struct clk clk;
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fdt_addr_t base = plat->base;
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int ret;
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bool stm32f4;
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u8 uart_enable_bit;
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plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
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stm32f4 = plat->uart_info->stm32f4;
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uart_enable_bit = plat->uart_info->uart_enable_bit;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret < 0)
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return ret;
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ret = clk_enable(&clk);
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if (ret) {
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dev_err(dev, "failed to enable clock\n");
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return ret;
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}
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plat->clock_rate = clk_get_rate(&clk);
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if (plat->clock_rate < 0) {
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clk_disable(&clk);
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return plat->clock_rate;
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};
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/* Disable uart-> enable fifo-> enable uart */
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clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
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BIT(uart_enable_bit));
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if (plat->uart_info->has_fifo)
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setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
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setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
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BIT(uart_enable_bit));
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return 0;
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}
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static const struct udevice_id stm32_serial_id[] = {
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{ .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
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{ .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
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{ .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
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{}
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};
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static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
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plat->base = devfdt_get_addr(dev);
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if (plat->base == FDT_ADDR_T_NONE)
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return -EINVAL;
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return 0;
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}
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static const struct dm_serial_ops stm32_serial_ops = {
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.putc = stm32_serial_putc,
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.pending = stm32_serial_pending,
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.getc = stm32_serial_getc,
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.setbrg = stm32_serial_setbrg,
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};
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U_BOOT_DRIVER(serial_stm32) = {
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.name = "serial_stm32",
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.id = UCLASS_SERIAL,
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.of_match = of_match_ptr(stm32_serial_id),
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.ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
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.platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
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.ops = &stm32_serial_ops,
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.probe = stm32_serial_probe,
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.flags = DM_FLAG_PRE_RELOC,
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};
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