7429b9623b
This PWM supports four channels. The driver always uses the 32KHz clock, and adjusts the duty cycle accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
19 lines
413 B
Makefile
19 lines
413 B
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2001
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# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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#ccflags-y += -DDEBUG
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obj-$(CONFIG_DM_PWM) += pwm-uclass.o
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obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
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obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
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ifdef CONFIG_DM_PWM
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obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o
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endif
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