Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by: York Sun <yorksun@freescale.com> |
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.. | ||
cpu | ||
include/asm | ||
lib | ||
config.mk |
Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by: York Sun <yorksun@freescale.com> |
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---|---|---|
.. | ||
cpu | ||
include/asm | ||
lib | ||
config.mk |