54c96b18a2
Move the function to the top of the file to avoid forward declaration. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
222 lines
5.0 KiB
C
222 lines
5.0 KiB
C
/*
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* (C) Copyright 2003
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* Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
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*
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* (C) Copyright 2002
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Altera FPGA support
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*/
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#include <common.h>
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#include <ACEX1K.h>
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#include <stratixII.h>
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/* Define FPGA_DEBUG to 1 to get debug printf's */
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#define FPGA_DEBUG 0
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/* Local Static Functions */
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static int altera_validate(Altera_desc *desc, const char *fn)
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{
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if (!desc) {
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printf("%s: NULL descriptor!\n", fn);
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return false;
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}
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if ((desc->family < min_altera_type) ||
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(desc->family > max_altera_type)) {
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printf("%s: Invalid family type, %d\n", fn, desc->family);
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return false;
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}
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if ((desc->iface < min_altera_iface_type) ||
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(desc->iface > max_altera_iface_type)) {
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printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
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return false;
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}
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if (!desc->size) {
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printf("%s: NULL part size\n", fn);
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return false;
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}
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return true;
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}
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/* ------------------------------------------------------------------------- */
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int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL; /* assume a failure */
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if (!altera_validate(desc, (char *)__func__)) {
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printf("%s: Invalid device descriptor\n", __func__);
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return FPGA_FAIL;
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}
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switch (desc->family) {
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case Altera_ACEX1K:
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case Altera_CYC2:
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#if defined(CONFIG_FPGA_ACEX1K)
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debug_cond(FPGA_DEBUG,
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"%s: Launching the ACEX1K Loader...\n",
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__func__);
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ret_val = ACEX1K_load (desc, buf, bsize);
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#elif defined(CONFIG_FPGA_CYCLON2)
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debug_cond(FPGA_DEBUG,
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"%s: Launching the CYCLONE II Loader...\n",
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__func__);
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ret_val = CYC2_load (desc, buf, bsize);
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#else
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printf("%s: No support for ACEX1K devices.\n",
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__func__);
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#endif
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break;
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#if defined(CONFIG_FPGA_STRATIX_II)
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case Altera_StratixII:
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debug_cond(FPGA_DEBUG,
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"%s: Launching the Stratix II Loader...\n",
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__func__);
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ret_val = StratixII_load (desc, buf, bsize);
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break;
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#endif
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default:
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printf("%s: Unsupported family type, %d\n",
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__func__, desc->family);
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}
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return ret_val;
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}
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int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL; /* assume a failure */
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if (!altera_validate (desc, (char *)__func__)) {
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printf("%s: Invalid device descriptor\n", __func__);
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return FPGA_FAIL;
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}
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switch (desc->family) {
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case Altera_ACEX1K:
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#if defined(CONFIG_FPGA_ACEX)
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debug_cond(FPGA_DEBUG,
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"%s: Launching the ACEX1K Reader...\n",
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__func__);
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ret_val = ACEX1K_dump (desc, buf, bsize);
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#else
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printf("%s: No support for ACEX1K devices.\n",
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__func__);
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#endif
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break;
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#if defined(CONFIG_FPGA_STRATIX_II)
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case Altera_StratixII:
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debug_cond(FPGA_DEBUG,
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"%s: Launching the Stratix II Reader...\n",
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__func__);
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ret_val = StratixII_dump (desc, buf, bsize);
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break;
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#endif
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default:
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printf("%s: Unsupported family type, %d\n",
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__func__, desc->family);
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}
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return ret_val;
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}
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int altera_info(Altera_desc *desc)
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{
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int ret_val = FPGA_FAIL;
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if (!altera_validate (desc, (char *)__func__)) {
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printf("%s: Invalid device descriptor\n", __func__);
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return FPGA_FAIL;
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}
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printf("Family: \t");
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switch (desc->family) {
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case Altera_ACEX1K:
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printf("ACEX1K\n");
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break;
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case Altera_CYC2:
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printf("CYCLON II\n");
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break;
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case Altera_StratixII:
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printf("Stratix II\n");
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break;
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/* Add new family types here */
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default:
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printf("Unknown family type, %d\n", desc->family);
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}
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printf("Interface type:\t");
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switch (desc->iface) {
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case passive_serial:
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printf("Passive Serial (PS)\n");
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break;
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case passive_parallel_synchronous:
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printf("Passive Parallel Synchronous (PPS)\n");
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break;
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case passive_parallel_asynchronous:
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printf("Passive Parallel Asynchronous (PPA)\n");
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break;
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case passive_serial_asynchronous:
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printf("Passive Serial Asynchronous (PSA)\n");
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break;
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case altera_jtag_mode: /* Not used */
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printf("JTAG Mode\n");
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break;
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case fast_passive_parallel:
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printf("Fast Passive Parallel (FPP)\n");
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break;
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case fast_passive_parallel_security:
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printf("Fast Passive Parallel with Security (FPPS)\n");
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break;
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/* Add new interface types here */
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default:
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printf("Unsupported interface type, %d\n", desc->iface);
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}
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printf("Device Size: \t%zd bytes\n"
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"Cookie: \t0x%x (%d)\n",
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desc->size, desc->cookie, desc->cookie);
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if (desc->iface_fns) {
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printf("Device Function Table @ 0x%p\n", desc->iface_fns);
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switch (desc->family) {
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case Altera_ACEX1K:
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case Altera_CYC2:
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#if defined(CONFIG_FPGA_ACEX1K)
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ACEX1K_info(desc);
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#elif defined(CONFIG_FPGA_CYCLON2)
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CYC2_info(desc);
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#else
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/* just in case */
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printf("%s: No support for ACEX1K devices.\n",
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__func__);
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#endif
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break;
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#if defined(CONFIG_FPGA_STRATIX_II)
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case Altera_StratixII:
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StratixII_info(desc);
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break;
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#endif
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/* Add new family types here */
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default:
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/* we don't need a message here - we give one up above */
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break;
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}
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} else {
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printf("No Device Function Table.\n");
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}
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ret_val = FPGA_SUCCESS;
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return ret_val;
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}
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