c7fd27ccfb
The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments. In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
119 lines
2.3 KiB
C
119 lines
2.3 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* Version 2 as published by the Free Software Foundation.
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*/
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#include <common.h>
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#include <ddr_spd.h>
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/* used for ddr1 and ddr2 spd */
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static int
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spd_check(const u8 *buf, u8 spd_rev, u8 spd_cksum)
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{
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unsigned int cksum = 0;
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unsigned int i;
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/*
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* Check SPD revision supported
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* Rev 1.X or less supported by this code
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*/
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if (spd_rev >= 0x20) {
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printf("SPD revision %02X not supported by this code\n",
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spd_rev);
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return 1;
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}
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if (spd_rev > 0x13) {
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printf("SPD revision %02X not verified by this code\n",
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spd_rev);
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}
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/*
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* Calculate checksum
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*/
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for (i = 0; i < 63; i++) {
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cksum += *buf++;
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}
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cksum &= 0xFF;
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if (cksum != spd_cksum) {
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printf("SPD checksum unexpected. "
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"Checksum in SPD = %02X, computed SPD = %02X\n",
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spd_cksum, cksum);
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return 1;
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}
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return 0;
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}
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unsigned int
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ddr1_spd_check(const ddr1_spd_eeprom_t *spd)
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{
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const u8 *p = (const u8 *)spd;
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return spd_check(p, spd->spd_rev, spd->cksum);
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}
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unsigned int
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ddr2_spd_check(const ddr2_spd_eeprom_t *spd)
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{
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const u8 *p = (const u8 *)spd;
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return spd_check(p, spd->spd_rev, spd->cksum);
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}
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/*
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* CRC16 compute for DDR3 SPD
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* Copied from DDR3 SPD spec.
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*/
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static int
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crc16(char *ptr, int count)
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{
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int crc, i;
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crc = 0;
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while (--count >= 0) {
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crc = crc ^ (int)*ptr++ << 8;
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for (i = 0; i < 8; ++i)
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if (crc & 0x8000)
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crc = crc << 1 ^ 0x1021;
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else
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crc = crc << 1;
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}
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return crc & 0xffff;
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}
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unsigned int
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ddr3_spd_check(const ddr3_spd_eeprom_t *spd)
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{
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char *p = (char *)spd;
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int csum16;
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int len;
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char crc_lsb; /* byte 126 */
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char crc_msb; /* byte 127 */
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/*
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* SPD byte0[7] - CRC coverage
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* 0 = CRC covers bytes 0~125
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* 1 = CRC covers bytes 0~116
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*/
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len = !(spd->info_size_crc & 0x80) ? 126 : 117;
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csum16 = crc16(p, len);
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crc_lsb = (char) (csum16 & 0xff);
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crc_msb = (char) (csum16 >> 8);
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if (spd->crc[0] == crc_lsb && spd->crc[1] == crc_msb) {
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return 0;
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} else {
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printf("SPD checksum unexpected.\n"
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"Checksum lsb in SPD = %02X, computed SPD = %02X\n"
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"Checksum msb in SPD = %02X, computed SPD = %02X\n",
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spd->crc[0], crc_lsb, spd->crc[1], crc_msb);
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return 1;
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}
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}
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