Tom Rini 1be1433b83 OMAP3: Add optimal SDRC autorefresh control values ... This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>		2011-12-06 23:59:38 +01:00
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cpu	OMAP3: Change mem_ok to clear again after reading back	2011-12-06 23:59:38 +01:00
include/asm	OMAP3: Add optimal SDRC autorefresh control values	2011-12-06 23:59:38 +01:00
lib	arm: printf() is not available in some SPL configurations	2011-12-06 23:59:37 +01:00
config.mk	Reduce build times	2011-11-03 20:44:58 +01:00