u-boot/arch/x86
Vadim Bendebury 1350f1cce1 x86: Provide a way to throttle port80 accesses
Some systems (like Google Link device) provide the ability to keep a
history of the target CPU port80 accesses, which is extremely handy
for debugging. The problem is that the EC handling port 80 access is
orders of magnitude slower than the AP. This causes random loss of
trace data.

This change allows to throttle port 80 accesses such that in case the
AP is trying to post faster than the EC can handle, a delay is
introduced to make sure that the post rate is throttled. Experiments
have shown that on Link the delay should be at least 350,000 of tsc
clocks.

Throttling is not being enabled by default: to enable it one would
have to set MIN_PORT80_KCLOCKS_DELAY to something like 400 and rebuild
the u-boot image. With upcoming EC code optimizations this number
could be decreased (new new value should be established
experimentally).

Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-06 14:30:43 -08:00
..
cpu x86: Provide a way to throttle port80 accesses 2012-12-06 14:30:43 -08:00
dts x86: fdt: Create basic .dtsi file for coreboot 2012-12-06 14:30:42 -08:00
include/asm x86: Add back cold- and warm-boot flags 2012-12-06 14:30:42 -08:00
lib x86: Add support for CONFIG_OF_CONTROL 2012-12-06 14:30:42 -08:00
config.mk x86: Wrap small helper functions from libgcc to avoid an ABI mismatch 2011-11-29 21:31:24 +11:00