f4863a7aec
Fix Intel 28F128J3 ID in include/flash.h * Patch by Masami Komiya, 09 Jan 2004: add support for TB0229 board (NEC VR4131 MIPS processor) * Patch by Leon Kukovec, 12 Dec 2003: changed extern __inline__ into static __inline__ in include/linux/byteorder/swab.h
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996 by Ralf Baechle
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* Copyright (C) 2000 by Maciej W. Rozycki
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*
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* Defitions for the address spaces of the MIPS CPUs.
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*/
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#ifndef __ASM_MIPS_ADDRSPACE_H
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#define __ASM_MIPS_ADDRSPACE_H
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/*
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* Memory segments (32bit kernel mode addresses)
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*/
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#define KUSEG 0x00000000
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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#define KSEG2 0xc0000000
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#define KSEG3 0xe0000000
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#define K0BASE KSEG0
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/*
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* Returns the kernel segment base of a given address
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*/
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#ifndef __ASSEMBLY__
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#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
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#else
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#define KSEGX(a) ((a) & 0xe0000000)
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#endif
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/*
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* Returns the physical address of a KSEG0/KSEG1 address
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*/
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#ifndef __ASSEMBLY__
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#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
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#else
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#define PHYSADDR(a) ((a) & 0x1fffffff)
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#endif
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/*
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* Returns the uncached address of a sdram address
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*/
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_AU1X00) || defined(CONFIG_TB0229)
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/* We use a 36 bit physical address map here and
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cannot access physical memory directly from core */
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#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
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#else /* !CONFIG_AU1X00 */
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#define UNCACHED_SDRAM(a) PHYSADDR(a)
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#endif /* CONFIG_AU1X00 */
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#endif /* __ASSEMBLY__ */
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/*
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* Map an address to a certain kernel segment
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*/
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#ifndef __ASSEMBLY__
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#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
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#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
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#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
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#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
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#else
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#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
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#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
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#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
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#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
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#endif
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/*
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* Memory segments (64bit kernel mode addresses)
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*/
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#define XKUSEG 0x0000000000000000
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#define XKSSEG 0x4000000000000000
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#define XKPHYS 0x8000000000000000
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#define XKSEG 0xc000000000000000
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#define CKSEG0 0xffffffff80000000
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#define CKSEG1 0xffffffffa0000000
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#define CKSSEG 0xffffffffc0000000
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#define CKSEG3 0xffffffffe0000000
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#endif /* __ASM_MIPS_ADDRSPACE_H */
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