02ea538ce9
We have a requirement to wait a period of time before enabling the DDR controller Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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board | ||
nand_boot_fsl_elbc.c | ||
nand_boot_fsl_ifc.c | ||
nand_boot_fsl_nfc.c | ||
nand_boot.c |