f55281665a
When the ti814x_evm config was removed most, but not all, of the
relevant support code was remove. Get rid of what was missed.
Fixes: 50b5326868 ("ti814x: Remove platform")
Signed-off-by: Tom Rini <trini@konsulko.com>
727 lines
20 KiB
Plaintext
727 lines
20 KiB
Plaintext
#
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# I2C subsystem configuration
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#
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menuconfig I2C
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bool "I2C support"
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default y
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help
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Note:
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This is a stand-in for an option to enable I2C support. In fact this
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simply enables building of the I2C directory for U-Boot. The actual
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I2C feature is enabled by DM_I2C (for driver model) and
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the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
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So at present there is no need to ever disable this option.
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Eventually it will:
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Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
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I2C works with a clock and data line which can be driven by a
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one or more masters or slaves. It is a fairly complex bus but is
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widely used as it only needs two lines for communication. Speeds of
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400kbps are typical but up to 3.4Mbps is supported by some
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hardware. Enable this option to build the drivers in drivers/i2c as
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part of a U-Boot build.
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if I2C
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config DM_I2C
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bool "Enable Driver Model for I2C drivers"
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depends on DM
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help
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Enable driver model for I2C. The I2C uclass interface: probe, read,
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write and speed, is implemented with the bus drivers operations,
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which provide methods for bus setting and data transfer. Each chip
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device (bus child) info is kept as parent plat. The interface
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is defined in include/i2c.h.
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config SPL_DM_I2C
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bool "Enable Driver Model for I2C drivers in SPL"
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depends on SPL_DM && DM_I2C
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default y
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help
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Enable driver model for I2C. The I2C uclass interface: probe, read,
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write and speed, is implemented with the bus drivers operations,
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which provide methods for bus setting and data transfer. Each chip
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device (bus child) info is kept as parent platdata. The interface
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is defined in include/i2c.h.
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config VPL_DM_I2C
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bool "Enable Driver Model for I2C drivers in VPL"
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depends on VPL_DM && DM_I2C
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default y
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help
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Enable driver model for I2C. The I2C uclass interface: probe, read,
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write and speed, is implemented with the bus drivers operations,
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which provide methods for bus setting and data transfer. Each chip
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device (bus child) info is kept as parent platdata. The interface
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is defined in include/i2c.h.
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config SYS_I2C_LEGACY
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bool "Enable legacy I2C subsystem and drivers"
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depends on !DM_I2C
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help
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Enable the legacy I2C subsystem and drivers. While this is
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deprecated in U-Boot itself, this can be useful in some situations
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in SPL or TPL.
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config SPL_SYS_I2C_LEGACY
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bool "Enable legacy I2C subsystem and drivers in SPL"
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depends on SUPPORT_SPL && !SPL_DM_I2C
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help
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Enable the legacy I2C subsystem and drivers in SPL. This is useful
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in some size constrained situations.
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config TPL_SYS_I2C_LEGACY
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bool "Enable legacy I2C subsystem and drivers in TPL"
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depends on SUPPORT_TPL && !SPL_DM_I2C
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help
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Enable the legacy I2C subsystem and drivers in TPL. This is useful
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in some size constrained situations.
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config SYS_I2C_EARLY_INIT
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bool "Enable legacy I2C subsystem early in boot"
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depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
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help
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Add the function prototype for i2c_early_init_f which is called in
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board_early_init_f.
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config I2C_CROS_EC_TUNNEL
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tristate "Chrome OS EC tunnel I2C bus"
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depends on CROS_EC
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help
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This provides an I2C bus that will tunnel i2c commands through to
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the other side of the Chrome OS EC to the I2C bus connected there.
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This will work whatever the interface used to talk to the EC (SPI,
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I2C or LPC). Some Chromebooks use this when the hardware design
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does not allow direct access to the main PMIC from the AP.
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config I2C_CROS_EC_LDO
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bool "Provide access to LDOs on the Chrome OS EC"
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depends on CROS_EC
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---help---
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On many Chromebooks the main PMIC is inaccessible to the AP. This is
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often dealt with by using an I2C pass-through interface provided by
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the EC. On some unfortunate models (e.g. Spring) the pass-through
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is not available, and an LDO message is available instead. This
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option enables a driver which provides very basic access to those
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regulators, via the EC. We implement this as an I2C bus which
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emulates just the TPS65090 messages we know about. This is done to
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avoid duplicating the logic in the TPS65090 regulator driver for
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enabling/disabling an LDO.
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config I2C_SET_DEFAULT_BUS_NUM
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bool "Set default I2C bus number"
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depends on DM_I2C
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help
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Set default number of I2C bus to be accessed. This option provides
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behaviour similar to old (i.e. pre DM) I2C bus driver.
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config I2C_DEFAULT_BUS_NUMBER
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hex "I2C default bus number"
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depends on I2C_SET_DEFAULT_BUS_NUM
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default 0x0
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help
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Number of default I2C bus to use
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config DM_I2C_GPIO
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bool "Enable Driver Model for software emulated I2C bus driver"
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depends on DM_I2C && DM_GPIO
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help
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Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
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configuration is given by the device tree. Kernel-style device tree
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bindings are supported.
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Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
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config SPL_DM_I2C_GPIO
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bool "Enable Driver Model for software emulated I2C bus driver in SPL"
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depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
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default y
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help
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Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
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configuration is given by the device tree. Kernel-style device tree
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bindings are supported.
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Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
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config SYS_I2C_AT91
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bool "Atmel I2C driver"
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depends on DM_I2C && ARCH_AT91
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help
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Add support for the Atmel I2C driver. A serious problem is that there
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is no documented way to issue repeated START conditions for more than
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two messages, as needed to support combined I2C messages. Use the
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i2c-gpio driver unless your system can cope with this limitation.
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Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
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config SYS_I2C_IPROC
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bool "Broadcom I2C driver"
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depends on DM_I2C
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help
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Broadcom I2C driver.
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Add support for Broadcom I2C driver.
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Say yes here to to enable the Broadco I2C driver.
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config SYS_I2C_FSL
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bool "Freescale I2C bus driver"
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help
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Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
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MPC85xx processors.
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if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
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config SYS_FSL_I2C_OFFSET
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hex "Offset from the IMMR of the address of the first I2C controller"
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config SYS_FSL_HAS_I2C2_OFFSET
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bool "Support a second I2C controller"
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config SYS_FSL_I2C2_OFFSET
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hex "Offset from the IMMR of the address of the second I2C controller"
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depends on SYS_FSL_HAS_I2C2_OFFSET
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config SYS_FSL_HAS_I2C3_OFFSET
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bool "Support a third I2C controller"
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config SYS_FSL_I2C3_OFFSET
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hex "Offset from the IMMR of the address of the third I2C controller"
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depends on SYS_FSL_HAS_I2C3_OFFSET
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config SYS_FSL_HAS_I2C4_OFFSET
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bool "Support a fourth I2C controller"
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config SYS_FSL_I2C4_OFFSET
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hex "Offset from the IMMR of the address of the fourth I2C controller"
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depends on SYS_FSL_HAS_I2C4_OFFSET
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endif
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config SYS_I2C_CADENCE
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tristate "Cadence I2C Controller"
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depends on DM_I2C
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help
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Say yes here to select Cadence I2C Host Controller. This controller is
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e.g. used by Xilinx Zynq.
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config SYS_I2C_CA
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tristate "Cortina-Access I2C Controller"
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depends on DM_I2C && CORTINA_PLATFORM
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help
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Add support for the Cortina Access I2C host controller.
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Say yes here to select Cortina-Access I2C Host Controller.
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config SYS_I2C_DAVINCI
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bool "Davinci I2C Controller"
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depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
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help
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Say yes here to add support for Davinci and Keystone I2C controller
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config SYS_I2C_DW
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bool "Designware I2C Controller"
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help
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Say yes here to select the Designware I2C Host Controller. This
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controller is used in various SoCs, e.g. the ST SPEAr, Altera
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SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
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config SYS_I2C_ASPEED
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bool "Aspeed I2C Controller"
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depends on DM_I2C && ARCH_ASPEED
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help
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Say yes here to select Aspeed I2C Host Controller. The driver
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supports AST2500 and AST2400 controllers, but is very limited.
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Only single master mode is supported and only byte-by-byte
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synchronous reads and writes are supported, no Pool Buffers or DMA.
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config SYS_I2C_INTEL
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bool "Intel I2C/SMBUS driver"
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depends on DM_I2C
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help
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Add support for the Intel SMBUS driver. So far this driver is just
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a stub which perhaps some basic init. There is no implementation of
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the I2C API meaning that any I2C operations will immediately fail
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for now.
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config SYS_I2C_IMX_LPI2C
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bool "NXP i.MX LPI2C driver"
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help
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Add support for the NXP i.MX LPI2C driver.
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config SYS_I2C_LPC32XX
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bool "LPC32XX I2C driver"
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depends on ARCH_LPC32XX
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help
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Enable support for the LPC32xx I2C driver.
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config SYS_I2C_MESON
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bool "Amlogic Meson I2C driver"
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depends on DM_I2C && ARCH_MESON
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help
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Add support for the I2C controller available in Amlogic Meson
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SoCs. The controller supports programmable bus speed including
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standard (100kbits/s) and fast (400kbit/s) speed and allows the
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software to define a flexible format of the bit streams. It has an
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internal buffer holding up to 8 bytes for transfers and supports
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both 7-bit and 10-bit addresses.
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config SYS_I2C_MTK
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bool "MediaTek I2C driver"
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help
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This selects the MediaTek Integrated Inter Circuit bus driver.
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The I2C bus adapter is the base for some other I2C client,
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eg: touch, sensors.
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If you want to use MediaTek I2C interface, say Y here.
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If unsure, say N.
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config SYS_I2C_MICROCHIP
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bool "Microchip I2C driver"
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help
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Add support for the Microchip I2C driver. This is operating on
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standard mode up to 100 kbits/s and fast mode up to 400 kbits/s.
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config SYS_I2C_MXC
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bool "NXP MXC I2C driver"
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help
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Add support for the NXP I2C driver. This supports up to four bus
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channels and operating on standard mode up to 100 kbits/s and fast
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mode up to 400 kbits/s.
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if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
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config SYS_I2C_MXC_I2C1
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bool "NXP MXC I2C1"
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help
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Add support for NXP MXC I2C Controller 1.
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Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
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config SYS_I2C_MXC_I2C2
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bool "NXP MXC I2C2"
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help
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Add support for NXP MXC I2C Controller 2.
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Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
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config SYS_I2C_MXC_I2C3
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bool "NXP MXC I2C3"
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help
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Add support for NXP MXC I2C Controller 3.
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Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
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config SYS_I2C_MXC_I2C4
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bool "NXP MXC I2C4"
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help
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Add support for NXP MXC I2C Controller 4.
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Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
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config SYS_I2C_MXC_I2C5
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bool "NXP MXC I2C5"
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help
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Add support for NXP MXC I2C Controller 5.
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Required for SoCs which have I2C MXC controller 5 eg LX2160A
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config SYS_I2C_MXC_I2C6
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bool "NXP MXC I2C6"
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help
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Add support for NXP MXC I2C Controller 6.
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Required for SoCs which have I2C MXC controller 6 eg LX2160A
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config SYS_I2C_MXC_I2C7
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bool "NXP MXC I2C7"
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help
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Add support for NXP MXC I2C Controller 7.
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Required for SoCs which have I2C MXC controller 7 eg LX2160A
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config SYS_I2C_MXC_I2C8
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bool "NXP MXC I2C8"
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help
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Add support for NXP MXC I2C Controller 8.
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Required for SoCs which have I2C MXC controller 8 eg LX2160A
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endif
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if SYS_I2C_MXC_I2C1
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config SYS_MXC_I2C1_SPEED
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int "I2C Channel 1 speed"
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default 40000000 if TARGET_LS2080A_EMU
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default 100000
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help
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MXC I2C Channel 1 speed
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config SYS_MXC_I2C1_SLAVE
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hex "I2C1 Slave"
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default 0
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help
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MXC I2C1 Slave
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endif
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if SYS_I2C_MXC_I2C2
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config SYS_MXC_I2C2_SPEED
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int "I2C Channel 2 speed"
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default 40000000 if TARGET_LS2080A_EMU
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default 100000
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help
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MXC I2C Channel 2 speed
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config SYS_MXC_I2C2_SLAVE
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hex "I2C2 Slave"
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default 0
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help
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MXC I2C2 Slave
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endif
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if SYS_I2C_MXC_I2C3
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config SYS_MXC_I2C3_SPEED
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int "I2C Channel 3 speed"
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default 100000
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help
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MXC I2C Channel 3 speed
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config SYS_MXC_I2C3_SLAVE
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hex "I2C3 Slave"
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default 0
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help
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MXC I2C3 Slave
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endif
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if SYS_I2C_MXC_I2C4
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config SYS_MXC_I2C4_SPEED
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int "I2C Channel 4 speed"
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default 100000
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help
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MXC I2C Channel 4 speed
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config SYS_MXC_I2C4_SLAVE
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hex "I2C4 Slave"
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default 0
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help
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MXC I2C4 Slave
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endif
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if SYS_I2C_MXC_I2C5
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config SYS_MXC_I2C5_SPEED
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int "I2C Channel 5 speed"
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default 100000
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help
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MXC I2C Channel 5 speed
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config SYS_MXC_I2C5_SLAVE
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hex "I2C5 Slave"
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default 0
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help
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MXC I2C5 Slave
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endif
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if SYS_I2C_MXC_I2C6
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config SYS_MXC_I2C6_SPEED
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int "I2C Channel 6 speed"
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default 100000
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help
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MXC I2C Channel 6 speed
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config SYS_MXC_I2C6_SLAVE
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hex "I2C6 Slave"
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default 0
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help
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MXC I2C6 Slave
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endif
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if SYS_I2C_MXC_I2C7
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config SYS_MXC_I2C7_SPEED
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int "I2C Channel 7 speed"
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default 100000
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help
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MXC I2C Channel 7 speed
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config SYS_MXC_I2C7_SLAVE
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hex "I2C7 Slave"
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default 0
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help
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MXC I2C7 Slave
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endif
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if SYS_I2C_MXC_I2C8
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config SYS_MXC_I2C8_SPEED
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int "I2C Channel 8 speed"
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default 100000
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help
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MXC I2C Channel 8 speed
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config SYS_MXC_I2C8_SLAVE
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hex "I2C8 Slave"
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default 0
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help
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MXC I2C8 Slave
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endif
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config SYS_I2C_NEXELL
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bool "Nexell I2C driver"
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depends on DM_I2C
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help
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Add support for the Nexell I2C driver. This is used with various
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Nexell parts such as S5Pxx18 series SoCs. All chips
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have several I2C ports and all are provided, controlled by the
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device tree.
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config SYS_I2C_NPCM
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bool "Nuvoton NPCM I2C driver"
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help
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Support for Nuvoton I2C controller driver.
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config SYS_I2C_OCORES
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bool "ocores I2C driver"
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depends on DM_I2C
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help
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Add support for ocores I2C controller. For details see
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https://opencores.org/projects/i2c
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config SYS_I2C_OMAP24XX
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bool "TI OMAP2+ I2C driver"
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depends on ARCH_OMAP2PLUS || ARCH_K3
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help
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Add support for the OMAP2+ I2C driver.
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config SYS_I2C_RCAR_I2C
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bool "Renesas RCar I2C driver"
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depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
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help
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Support for Renesas RCar I2C controller.
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config SYS_I2C_RCAR_IIC
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bool "Renesas RCar Gen3 IIC driver"
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depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
|
|
help
|
|
Support for Renesas RCar Gen3 IIC controller.
|
|
|
|
config SYS_I2C_ROCKCHIP
|
|
bool "Rockchip I2C driver"
|
|
depends on DM_I2C
|
|
help
|
|
Add support for the Rockchip I2C driver. This is used with various
|
|
Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
|
|
have several I2C ports and all are provided, controlled by the
|
|
device tree.
|
|
|
|
config SYS_I2C_SANDBOX
|
|
bool "Sandbox I2C driver"
|
|
depends on SANDBOX && DM_I2C
|
|
help
|
|
Enable I2C support for sandbox. This is an emulation of a real I2C
|
|
bus. Devices can be attached to the bus using the device tree
|
|
which specifies the driver to use. See sandbox.dts as an example.
|
|
|
|
config SYS_I2C_SH
|
|
bool "Legacy SuperH I2C interface"
|
|
depends on ARCH_RMOBILE && SYS_I2C_LEGACY
|
|
help
|
|
Enable the legacy SuperH I2C interface.
|
|
|
|
if SYS_I2C_SH
|
|
config SYS_I2C_SH_NUM_CONTROLLERS
|
|
int
|
|
default 5
|
|
|
|
config SYS_I2C_SH_BASE0
|
|
hex
|
|
default 0xE6820000
|
|
|
|
config SYS_I2C_SH_BASE1
|
|
hex
|
|
default 0xE6822000
|
|
|
|
config SYS_I2C_SH_BASE2
|
|
hex
|
|
default 0xE6824000
|
|
|
|
config SYS_I2C_SH_BASE3
|
|
hex
|
|
default 0xE6826000
|
|
|
|
config SYS_I2C_SH_BASE4
|
|
hex
|
|
default 0xE6828000
|
|
|
|
config SH_I2C_8BIT
|
|
bool
|
|
default y
|
|
|
|
config SH_I2C_DATA_HIGH
|
|
int
|
|
default 4
|
|
|
|
config SH_I2C_DATA_LOW
|
|
int
|
|
default 5
|
|
|
|
config SH_I2C_CLOCK
|
|
int
|
|
default 104000000
|
|
endif
|
|
|
|
config SYS_I2C_SOFT
|
|
bool "Legacy software I2C interface"
|
|
help
|
|
Enable the legacy software defined I2C interface
|
|
|
|
config SYS_I2C_SOFT_SPEED
|
|
int "Software I2C bus speed"
|
|
depends on SYS_I2C_SOFT
|
|
default 100000
|
|
help
|
|
Speed of the software I2C bus
|
|
|
|
config SYS_I2C_SOFT_SLAVE
|
|
hex "Software I2C slave address"
|
|
depends on SYS_I2C_SOFT
|
|
default 0xfe
|
|
help
|
|
Slave address of the software I2C bus
|
|
|
|
config SYS_I2C_OCTEON
|
|
bool "Octeon II/III/TX/TX2 I2C driver"
|
|
depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
|
|
default y
|
|
help
|
|
Add support for the Marvell Octeon I2C driver. This is used with
|
|
various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
|
|
chips have several I2C ports and all are provided, controlled by
|
|
the device tree.
|
|
|
|
config SYS_I2C_S3C24X0
|
|
bool "Samsung I2C driver"
|
|
depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
|
|
help
|
|
Support for Samsung I2C controller as Samsung SoCs.
|
|
|
|
config SYS_I2C_STM32F7
|
|
bool "STMicroelectronics STM32F7 I2C support"
|
|
depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
|
|
help
|
|
Enable this option to add support for STM32 I2C controller
|
|
introduced with STM32F7/H7 SoCs. This I2C controller supports :
|
|
_ Slave and master modes
|
|
_ Multimaster capability
|
|
_ Standard-mode (up to 100 kHz)
|
|
_ Fast-mode (up to 400 kHz)
|
|
_ Fast-mode Plus (up to 1 MHz)
|
|
_ 7-bit and 10-bit addressing mode
|
|
_ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
|
|
_ All 7-bit addresses acknowledge mode
|
|
_ General call
|
|
_ Programmable setup and hold times
|
|
_ Easy to use event management
|
|
_ Optional clock stretching
|
|
_ Software reset
|
|
|
|
config SYS_I2C_SUN6I_P2WI
|
|
bool "Allwinner sun6i P2WI controller"
|
|
depends on ARCH_SUNXI
|
|
help
|
|
Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded
|
|
in the Allwinner A31 and A31s SOCs. This interface is used to connect
|
|
to specific devices like the X-Powers AXP221 PMIC.
|
|
|
|
config SYS_I2C_SUN8I_RSB
|
|
bool "Allwinner sun8i Reduced Serial Bus controller"
|
|
depends on ARCH_SUNXI
|
|
help
|
|
Support for Allwinner's Reduced Serial Bus (RSB) controller. This
|
|
controller is responsible for communicating with various RSB based
|
|
devices, such as X-Powers AXPxxx PMICs and AC100/AC200 CODEC ICs.
|
|
|
|
config SYS_I2C_SYNQUACER
|
|
bool "Socionext SynQuacer I2C controller"
|
|
depends on ARCH_SYNQUACER && DM_I2C
|
|
help
|
|
Support for Socionext Synquacer I2C controller. This I2C controller
|
|
will be used for RTC and LS-connector on DeveloperBox.
|
|
|
|
config SYS_I2C_TEGRA
|
|
bool "NVIDIA Tegra internal I2C controller"
|
|
depends on ARCH_TEGRA
|
|
help
|
|
Support for NVIDIA I2C controller available in Tegra SoCs.
|
|
|
|
config SYS_I2C_UNIPHIER
|
|
bool "UniPhier I2C driver"
|
|
depends on ARCH_UNIPHIER && DM_I2C
|
|
default y
|
|
help
|
|
Support for UniPhier I2C controller driver. This I2C controller
|
|
is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
|
|
|
|
config SYS_I2C_UNIPHIER_F
|
|
bool "UniPhier FIFO-builtin I2C driver"
|
|
depends on ARCH_UNIPHIER && DM_I2C
|
|
default y
|
|
help
|
|
Support for UniPhier FIFO-builtin I2C controller driver.
|
|
This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
|
|
|
|
config SYS_I2C_VERSATILE
|
|
bool "Arm Ltd Versatile I2C bus driver"
|
|
depends on DM_I2C && TARGET_VEXPRESS64_JUNO
|
|
help
|
|
Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
|
|
controller is present in the development boards manufactured by Arm Ltd.
|
|
|
|
config SYS_I2C_MV
|
|
bool "Marvell PXA (Armada 3720) I2C driver"
|
|
help
|
|
Support for PXA based I2C controller used on Armada 3720 SoC.
|
|
In Linux, this driver is called i2c-pxa.
|
|
|
|
config SYS_I2C_MVTWSI
|
|
bool "Marvell I2C driver"
|
|
help
|
|
Support for Marvell I2C controllers as used on the orion5x and
|
|
kirkwood SoC families.
|
|
|
|
config TEGRA186_BPMP_I2C
|
|
bool "Enable Tegra186 BPMP-based I2C driver"
|
|
depends on TEGRA186_BPMP
|
|
help
|
|
Support for Tegra I2C controllers managed by the BPMP (Boot and
|
|
Power Management Processor). On Tegra186, some I2C controllers are
|
|
directly controlled by the main CPU, whereas others are controlled
|
|
by the BPMP, and can only be accessed by the main CPU via IPC
|
|
requests to the BPMP. This driver covers the latter case.
|
|
|
|
config SYS_I2C_SLAVE
|
|
hex "I2C Slave address channel (all buses)"
|
|
depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
|
|
default 0xfe
|
|
help
|
|
I2C Slave address channel 0 for all buses in the legacy drivers.
|
|
Many boards/controllers/drivers don't support an I2C slave
|
|
interface so provide a default slave address for them for use in
|
|
common code. A real value for CONFIG_SYS_I2C_SLAVE should be
|
|
defined for any board which does support a slave interface and
|
|
this default used otherwise.
|
|
|
|
config SYS_I2C_SPEED
|
|
int "I2C Slave channel 0 speed (all buses)"
|
|
depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
|
|
default 100000
|
|
help
|
|
I2C Slave speed channel 0 for all buses in the legacy drivers.
|
|
|
|
config SYS_I2C_BUS_MAX
|
|
int "Max I2C busses"
|
|
depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
|
|
default 2 if TI816X
|
|
default 3 if OMAP34XX || AM33XX || AM43XX
|
|
default 4 if ARCH_SOCFPGA || OMAP44XX
|
|
default 5 if OMAP54XX
|
|
help
|
|
Define the maximum number of available I2C buses.
|
|
|
|
config SYS_I2C_XILINX_XIIC
|
|
bool "Xilinx AXI I2C driver"
|
|
depends on DM_I2C
|
|
help
|
|
Support for Xilinx AXI I2C controller.
|
|
|
|
config SYS_I2C_IHS
|
|
bool "gdsys IHS I2C driver"
|
|
depends on DM_I2C
|
|
help
|
|
Support for gdsys IHS I2C driver on FPGA bus.
|
|
|
|
source "drivers/i2c/muxes/Kconfig"
|
|
|
|
endif
|