When SATA is selected (via jumper J6) we need to disable the first PCIe
node in the device tree, so that Linux doesn't initialize it. Otherwise
the Linux SATA driver will fail to detect the devices.
The same goes the other way around too. So if PCIe is selected we need
to disable the SATA node in the device tree.
This is because PCIe port 0 and SATA on 460EX share the same pins
(multiplexed) and we have to configure in U-Boot which peripheral is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Several board/<...>/config.mk files include dynamically built (by
the Makefile) config files but used the wrong file name of
$(TOPDIR)/board/$(BOARDDIR)/config.tmp
instead if the correct
$(OBJTREE)/board/$(BOARDDIR)/config.tmp
The bug is nasty because the build result is correct for the (normal)
in-tree builds, and because 'sinclude' is used no errors get raised
even for out-of-tree build tests. But out-of-tree builds use an
incomplete and thus usually incorrect configuration...
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the canyonlands config.mk file to enable correct
out-of-tree builds. Thanks to Wolfgang Denk for spotting this.
Signed-off-by: Stefan Roese <sr@denx.de>
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.
Signed-off-by: Stefan Roese <sr@denx.de>
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.
Signed-off-by: Stefan Roese <sr@denx.de>
Calculation of tail was incorrect when size % 4 == 0.
New code removes the conditional and does the same thing but with arithmetic
Signed-off-by: Nick Spence <nick.spence@freescale.com>
When using dhcp/bootp the "netmask" environment variable is not set
because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
desireable, so the following patch adds this this option to the board
config.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch reworks the default environment on Makalu. Now "net_nfs" for
example uses the device-tree style booting formerly know as "net_nfs_fdt".
Also the addresses in RAM were changed because of the new image booting
support, which check for image overwriting. So the addresses needed to
get adjusted.
Signed-off-by: Stefan Roese <sr@denx.de>
map_physmem currently generates a warning when CONFIG_PHYS_64BIT is
enabled. This quiets the warning.
Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com>
Physical addrs need to be represented by phys_addr_t, not
unsigned long. Otherwise, systems that use CONFIG_PHYS_64BIT
are going to fail mightily.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This patch enables legacy multi-type images containing only a Linux kernel
and root file system to be loaded, maintaining compatibility with previous
versions of u-boot.
This is required when using old image files such as a Linux 2.4 kernel /
filesystem.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.
Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.
The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.
Signed-off-by: Stelian Pop <stelian@popies.net>
According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
Also fix a typo when verifying a jumper configuration. While at it, make
two needlessly global functions static.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.
Make sure to use correct logbuffer base address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Recent modifcations to LOGBUFFER handling code were incorrecly
introduced to fit_check_kernel() routine during
"Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing",
commit 27f33e9f45.
This patch cleans up this merge issue.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Changed implementation such that fw_printenv returns failure status
when one or more specified variables do not exist or when incorrect
command syntax is used.
This aids scripting fw_printenv such that the script can key of the
return status rather than relying on standard error "scraping".
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
In the current top-of-tree, 1.3.3.-rc2, the optional tool
'tools/env/fw_printenv' fails to compile for two reasons:
1) The header watchdog.h cannot be found.
2) The header zlib.h is picked up from the tool chain rather than the
project causing a prototype conflict for crc32.
This patch addresses both of these issues.
Platforms Tested On:
- AMCC "Kilauea"
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
When CONFIG_CMDLINE_EDITING is enabled, readline_into_buffer() doesn't
work before relocating to RAM because command history is written into
a global array that is not writable before relocation. This patch
defers to the no-editing and no-history code in readline_into_buffer()
if it is called before relocation.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
Add support for the recognition of 'powerpc' as an alias for the PowerPC
architecture type since Linux is already trending in that direction,
preferring 'powerpc' to 'ppc'.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
The 7610 and related parts have an L2IP bit in the L2CR that is
monitored to signal when the L2 cache invalidate is complete whereas the
7450 and related parts utilize L2I for this purpose. However, the
current code does not account for this difference. Additionally the 86xx
L2 cache invalidate code used an "andi" instruction where an "andis"
instruction should have been used.
This patch addresses both of these bugs.
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Acked-By: Jon Loeliger <jdl@freescale.com>
Fix a bogus circular dependency that caused an infinite loop of
"Generating include/autoconf.mk" again and again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds fdt (flattened device tree) support to all remaining AMCC
eval boards. Most newer boards already support device tree. With this patch,
all AMCC boards now enable device tree passing from U-Boot to Linux
arch/powerpc kernels.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a default ft_board_setup() routine to the 4xx fdt code.
This routine is defined as weak and can be overwritten by a board specific
one if needed.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds fdt (flattened device tree) support to the AMCC
Acadia eval board. This increases the image size and it doesn't
fit anymore into 256kByte. Since we didn't want to remove features
from the configuration, we decided to increase the U-Boot image size
(add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for booting with a device tree blob. This is needed to boot
ARCH=powerpc kernels. Also add support for setting the eth0 mac address
via the ethaddr variable.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Stefan Roese <sr@denx.de>
Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.
Here's an example on gth2_config:
mips_4KC-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.
In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.
In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.
This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code with/without this patch.
90000668: 1485ffef bne a0,a1,90000628 <mips_cache_reset+0x20>
9000066c: ac80fffc sw zero,-4(a0)
90000670: 01402821 move a1,t2
-90000674: 0411ffba bal 90000560 <mips_init_icache>
-90000678: 01803021 move a2,t4
-9000067c: 01602821 move a1,t3
-90000680: 0411ffcc bal 900005b4 <mips_init_dcache>
-90000684: 01a03021 move a2,t5
-90000688: 03000008 jr t8
-9000068c: 00000000 nop
+90000674: 01803021 move a2,t4
+90000678: 8f8f83ec lw t7,-31764(gp)
+9000067c: 01e0f809 jalr t7
+90000680: 00000000 nop
+90000684: 01602821 move a1,t3
+90000688: 01a03021 move a2,t5
+9000068c: 8f8f81e0 lw t7,-32288(gp)
+90000690: 01e0f809 jalr t7
+90000694: 00000000 nop
+90000698: 03000008 jr t8
+9000069c: 00000000 nop
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Some systems are dumb and do not implement the -n flag to echo (like OS X).
Convert the Makefile to use printf as this should work everywhere.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
If you enable environment in the flash, but disable the embedded
option, and you disable the saveenv command, then the #if nested
logic will trigger a compile failure:
env_flash.c: In function 'env_relocate_spec':
env_flash.c:399: error: 'flash_addr' undeclared (first use in this function)
The fix is to add CMD_SAVEENV ifdef protection like everywhere else.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix incorrect mask to enable all 64MB of onboard flash.
Previously U-Boot incorrectly mapped only 8MB of flash, this
patch correctly maps all the available flash.
Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
The mmap() related code is full of inconsistent casts/constants when
it comes to error checking, and may break when building on some
systems (like ones that do not implicitly define the caddr_t type).
Let's just avoid the whole mess by writing the code nice and clean in
the first place.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
and Tx clock lines. They are configured using 2 bits in extended
register 0x17.
Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
--
drivers/net/tsec.c | 6 ++++++
drivers/net/tsec.h | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
Some config.mk files reference $(CC) to test for specific tool chain
features, so make sure $(CC) gets set before including any such
config files.
This patch replaces commit b7166e05a5 ("ColdFire: Get information from
the correct GCC").
Signed-off-by: Wolfgang Denk <wd@denx.de>
start.S:183:1: warning: "ICMR" redefined
In file included from start.S:33:
include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition
start.S:187:1: warning: "RCSR" redefined
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch fixes a problem with the month being read and written
incorrectly (offset by one). This only gets visible by also using
the Linux driver (rtc-m41t80).
Tested on AMCC Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Current trick to pick up GNU assembler minor version uses a dot(.) as a
delimiter, and take the second field to obtain minor version number. But
as can be expected, this doesn't work with a version string which has
dots more than needs.
Here's an example:
$ mips-linux-gnu-as --version | grep 'GNU assembler'
GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
2-129) 2
$
This patch restricts the version format to 2.XX.XX... This will work
in most cases.
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
18
$
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Onenand needs a version of memcpy() which performs 16 bit accesses
only; make sure the name does not conflict with the standard
function.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2.
There is no pattern that can be used to determine which chips use which
frequency, so the only way to determine is to look up the actual SOC
designation and use the right value for that SOC.
Signed-off-by: Timur Tabi <timur@freescale.com>
The ethernet hang is caused by receiving buffer in DRAM is not
yet ready due to access cycles require longer time in DRAM.
Relocate DMA buffer descriptors from DRAM to internal SRAM.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Fix warnings
nv_nand.c: In function 'saveenv':
env_nand.c:200: warning: passing argument 3 of 'nand_write' from incompatible pointer type
env_nand.c: In function 'env_relocate_spec':
env_nand.c:275: warning: passing argument 3 of 'nand_read' from incompatible pointer type
if compiled for davinci_schmoogie_config.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Ack by: Sergey Kubushyn <ksi@koi8.net>
MPC8610HPCD board adds -O2 gcc option to PLATFORM_CPPFLAGS
causing overriding default -Os option. New gcc (ver. 4.2.2)
produces warnings while compiling net/net.c file with -O2
option. The patch is an attempt to fix this.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This problem shows up with parallel builds only; it results in
somewhat cryptic error messages like
$ JOBS=-j6 MAKEALL netstar
Configuring for netstar board...
arm-linux-ld: cannot find -lgeneric
make[1]: *** [eeprom.srec] Error 1
A few boards (like netstar and voiceblue) need some libraries for
building; however, the board Makefile does not contain any such
dependencies which may cause problems with parallel builds. Adding
such dependencies is difficult as we would also have to provide build
rules, which already exist in the respective library Makefiles.
To solve this, we make sure that all libraries get built before the
board code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
used for NAND booting to match the values needed for the new 512MB
DIMM modules shipped with the productions boards:
Crucial: CT6464AC667.8FB
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with DIMMs that have 8 banks. Now the
MCIF0_MBxCF register will be setup correctly for this setup too.
This was noticed with the 512MB DIMM on Canyonlands/Glacier.
Signed-off-by: Stefan Roese <sr@denx.de>
Newer gcc's might be configured to enable autovectorization by default.
If we happen to build with one of those compilers we will get SPE
instructions in random code.
-mno-spe disables the compiler for automatically generating SPE
instructions without our knowledge.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename init_addr and init_ext_addr to match the docs between
85xx and 86xx. Both now use 'init_addr' and 'init_ext_addr'.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* adjust __spin_table alignment to match ePAPR v0.94 spec
* loop over all cpus when determing who is up. This fixes an issue if
the "boot cpu" isn't core0. The "boot cpu" will already be in the
cpu_up_mask so there is no harm
* Added some protection in the code to ensure proper behavior. These
changes are explicitly needed but don't hurt:
- Added eieio to ensure the "hot word" of the table is written after
all other table updates have occurred.
- Added isync to ensure we don't prefetch loading of table entries
until we a released
These issues we raised by Dave Liu.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
LWMON5 DSPIC POST uses the watch-dog scratch register. So, make
the CFG_DSPIC_TEST_ADDR definition more readable.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Some boards (e.g. lwmon5) need rather a frequent watch-dog
kicking. Since the time it takes for the flush_cache() function
to complete its job depends on the size of data being flushed, one
may encounter watch-dog resets on such boards when, for example,
download big files over ethernet.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.
Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.
Signed-off-by: Stefan Roese <sr@denx.de>
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
doesn't exist.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Move non-inlied functions into specific drivers file
Set get_prom as weak
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Currently the timeout waiting for an ARP reply is hard set to 5 seconds.
On i.MX31ADS due to a hardware "strangeness" up to four first IP packets
to the boards get lost, which typically are ARP replies. By configuring
the timeout to a lower value we significantly improve the first network
transfer time on this board. The timeout is specified in milliseconds,
later internally it is converted to deciseconds, because it has to be
converted to hardware ticks, and CFG_HZ ranges from 900 to 27000000 on
different boards.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remove a redundant register definition, clean up some coding style
violations.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The specification for the lwmon5 board dsPIC POST got changed.
Also add defines for the temperatures and voltages.
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.
Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The IDE driver can use 32-bit addresses in LBA mode, in which case it
spits multiple warnings during compilation. Fix them.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
out_8 wants a pointer to an unsigned as the first argument. Add a
maintainer for Linkstation boards.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Arithmetic expressions do not get evaluated under stringification. Remove
default network configuration, add DHCP command support. Thanks to Felix
Radensky for reporting.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This patch removes the unknown flash message information:
'## Unknown FLASH on Bank 1 - Size = 0xdeadbeef = -286261248 MB'
This unknown flash message is caused by PromJet.
Some of the board user is unhappy with this information.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
This patch adds a configurable flash auto protection list that can be used
to make U-Boot protect flash regions in flash_init().
The idea has been discussed on the u-boot mailing list starting
on Nov 18th, 2007.
Even this patch brings a new feature it is used as a bugfix for 4xx
platforms where flash_init() does not completely protect the
monitor's flash range in all situations.
U-Boot protects the flash range from CFG_MONITOR_BASE to
(CFG_MONITOR_BASE + monitor_flash_len - 1) by default. This does not
include the reset vector at 0xfffffffc.
Example:
#define CFG_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}
This config option will auto protect the last 512k of flash that
contains the bootloader on board like APC405 and PMC405.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Some files didn't get updated properly with the "Use watchdog-aware
functions when calculating hashes of images" commit, this commit
fixes this.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
environment variable will now get passed to the Linux kernel by setting
the device_type property of the PCIe device tree node. For normal root-
complex configuration it will keep its defaults value of "pci" and for
endpoint configuration it will get changed to "pci-endpoint".
Signed-off-by: Stefan Roese <sr@denx.de>
Use the GPT0_MASKx registers as the temporary storage for watch-dog
timer POST test instead of GPT0_COMPx. The latter
(GPT0_COMP1..GPT0_COMP5) are used for the log-buffer header.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
This reverts commit 70431e8a73 which has
proven problematic getting right from the start at least on 83xx and
4xx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
CONFIG_ENV_OVERWRITE is also added.
This patch is originally created by Jean-Christophe PLAGNIOL-VILLARD.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Implement watchodg-aware variants of hash calculation functions:
- crc32_wd()
- md5_wd()
- sha1_csum_wd()
The above functions calculate the hash of the input buffer in chunks,
triggering the watchdog after processing each chunk. The chunk size
is given as a function call parameter.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
No functional change.
This patch was originally submitted by Jean-Christophe PLAGNIOL-VILLARD.
Then I re-created from scratch, and changed more lines than the original.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
in commit fad634071 "make show_boot_progress () weak."
show_boot_progress is supposed to be declared as weak but declared as
inline instead.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
As suggested by Wolfgang Denk:
- image printing functions:
- remove wrappers
- remove indentation prefix from functions' signatures
- merge getenv_verify and getenv_autostart into one parametrized function
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Update MX31ADS default environment to better match the flash layout and
the memory map, support SPI and RTC.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
The envcrc.c does sizeof(unsigned long) when calculating the crc, but
this is done with the build toolchain instead of the target tool
chain, so if the build is a 64bit system but the target is 32bits,
the size will obviously be wrong. This converts all unsigned long
stuff related to crc32 to uint32_t types. Compile tested only: output
of ./tools/envcrc when run on a 32bit build system matches that of a
64bit build system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.
Changes:
- Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing!
Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
Limit the rate of h/w watch-dog triggering on the LWMON5 board by
the CONFIG_WD_MAX_RATE value.
Note that an earlier version of this patch which used microseconds
instead of ticks dis not work. The problem was that we used
usec2ticks() to convert microseconds into ticks. usec2ticks() uses
get_tbclk(), which in turn calls get_sys_info(). It turns out that
this function does a lot of prolonged operations (like divisions)
which take too much time so we do not trigger the watchdog in time,
and it resets the system.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.
To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the Canyonlands and Glacier default environment to better
fit to the arch/powerpc device-tree kernels. The variables dealing with
arch/ppc booting are removed, since these boards are supported only in
arch/powerpc. Glacier uses the same config file as Canyonlands.
Also, the Glacier now uses non-FPU rootpath, since 460GT has no FPU.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the temporary 'test' strapping option
of the sbe command. The '667' strapping option now uses
a PLB/PCI divider of 3.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
- Coding style cleanup (long lines)
- Add s1d13505 support
- Make some functions return a result code instead of void
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
dcache_enable() was missing for 440 and the patch
017e9b7925 ["allow ports to override bootelf
"] behavior uses this function.
Note: Currently the cache handling functions like
d/icache_disable/enable() are NOP's on 440. This may be changed in the
future.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch correctly sets the oobavail variable
and fixes a bug where the oob data was not valid when
there where multiple groups in oobfree.
First segment fixes a typo
Second segment fixes a bug where oob data may be copied incorrectly.
Third segment adds an error message when exiting due to write protect.
Forth segment fixes a bug where oobavail may be set incorrectly.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This patch assigns the correct EBC clock for 405GP(r) CPUs
to PPC4xx_SYS_INFO structure. Without this patch U-Boot
uses an uninitialized EBC clock in its startup message.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Some 85xx chips use CCB as the base clock for the I2C. Some use CCB/2, and
some use CCB/3. There is no pattern that can be used to determine which
chips use which frequency, so the only way to determine is to look up the
actual SOC designation and use the right value for that SOC.
Update immap_85xx.h to include the GUTS PORDEVSR2 register.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch allows U-Boot to use buffered writes to the Spansion NOR
flash installed on this board, and eliminates long delays in network
transfers after the board startup.
Also modify flash layout to embed main and redundant environment
blocks in the U-Boot image.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by
Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for booting from 2k page sized NAND device
(e.g. Micron 29F2G08AAC).
Tested on AMCC Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently U-Boot crashes in ppc_4xx_eth_init on sequoia
with cache enabled (TLB Parity exeption). This patch
fixes the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently U-Boot crashes on sequoia board in CPU POST if
cache is enabled (CONFIG_4xx_DCACHE defined). The cache
won't be disabled by change_tlb before CPU POST because
there is an insufficient adress range check since
CFG_MEM_TOP_HIDE was introduced. This patch tries to fix
this problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
MC13783 is a multifunction IS with an SPI interface to the host. This
driver handles the RTC controller in this chip.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Split the arch-specific logic out of the common go code and into a dedicated
weak function called do_go_exec() that lives in cpu directories. This will
need review from i386/nios people to make sure I didn't break them.
Change the bootelf setup function into a dedicated weak function called
do_bootelf_exec. This way ports can control the behavior however they
like before/after calling the ELF entry point.
Rearrange ARM boards in Makefile so that ARM926EJ-S boards
are no longer under ARM92xT header.
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Ack-By Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch removes the board dependent parts from
"drivers/mtd/dataflash.c".
Each board relying on this, will have the appropriate
code in a new file, "partition.c" in the board directory.
board Makefiles updated to use the file.
The dataflash partitions are aligned on sector/page boundaries.
The CONFIG_NEW_DF_PARTITION was used to create named partitions
This is now the default operation, and the CONFIG variable is removed.
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Before new uImage code was merged, bootm code allowed for the kernel image to
get overwritten during decompresion. new uImage introduced a check for image
overwrites and refused to boot the image that got overwritten. This patch
restores the old behavior. It also adds a warning when the image overwriten is
a multi-image file, because in such case accessing componentes other than the
first one will fail.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
The cross compiler is responsible for providing the correct libraries
and the logic to find the linking libraries.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Before the first call of ide_reset(), the level of the IDE reset
signal on the TQM5200 is low (reset asserted). This patch sets the
default value to high (reset not asserted).
Currently this patch fixes no real problem, but it is cleaner to
assert the reset signal only on demand, and not permanently.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
According to the ata (ata5) specification the RESET- signal
shall be asserted for at least 25 us. Without this patch,
the RESET- signal is asserted on some boards for only < 1 us
(e. g. on the TQM5200). This patch adds a general delay of
25 us to the RESET- signal.
Without this patch a Platinum 4 GiB CF card is not recognised
properly on boards with a TQM5200 (STK52xx, TB5200).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
In function 'logbuff_init_ptrs':
cmd_log.c:79: warning: pointer targets in assignment differ in signedness
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.
Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Current libata.h of u-boot is out of sync from linux kernel,
this patch make it be consistent with linux kernel.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Tor Krill <tor@excito.com>
The linux kernel is now mostly ARCH=powerpc, so to make life easier
allow use to use ARCH=powerpc and convert it to ARCH=ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It should access with 16-bit instead of 8-bit
Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This patch is based on the port by Mihai Georgian (see linkstation.c for
Copyright information) and implements support for LinkStation / KuroBox HD
and HG PPC models from Buffalo Technology, whereby HD is deactivated at
the moment, pending network driver fixing.
Notice to users: this is pretty much a barebone port. Support for network
on HG models is already in the U-Boot mainline, but you might also want
patches to switch fan / phy modes depending on the negotiated ethernet
parameters. This patch also doesn't support console switching, booting EM
mode, Buffalo specific ext2 magic number. So, if you want to use any of
those, you need additional patches. Otherwise this patche provides a fully
functional u-boot with a network console on your system.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
cmd_init.c. Add CONFIG_MII_INIT to board configuration files
that use mii_init() in cmd_init.c.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some systems have md5.h installed in /usr/include/. This isn't the
desired file (we want the one in include/md5.h). This will avoid the
conflict. This fixes the host tools building problem by creating a new
directory for U-Boot specific header files.
[Patch by Andy Fleming, modified to use separate directory by Wolfgang
Denk]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Adds Support for Altera's Stratix II.
Within your board specific init file you will have to call
1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);
Altera_desc* contines (for example):
{
Altera_StratixII, /* part type */
passive_serial, /* interface type */
1, /* bytes of data part can accept */
(void *)(&funcs), /* interface function table */
0L, /* base interface address */
0 /* implementation specific cookie */
}
funcs is the interface. It is of type altera_board_specific_func.
It looks like this:
altera_board_specific_func func = {
pre_fn,
config_fn,
status_fn,
done_fn,
clk_fn,
data_fn,
abort_fn,
post_fn,
};
you will have to implement these functions, which is usually bit
banging some gpio.
Signed-off-by: Eran Liberty <liberty@extricom.com>
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
It isn't generally save to execute applications outside of U-Boot with caches
enabled due to the way the Blackfin processor handles caches (requires
software assistance). This patch disables caches before booting an ELF or
just booting raw code. The previous discussion on the patch was that we
wanted to use weaks instead, but that proved to not be feasible when multiple
symbols are involved, which puts us back at the ifdef solution. I've
minimized the ugliness by moving the setup step outside of the main function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the LM73 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
512 C too high. This patch fixes the problem, and does general cleanup
of the code.
Signed-off-by: Larry Johnson <lrj@acm.org>
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
32-bit wide ECC memory modules report 40-bit width.
Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.
Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.
However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.
The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>
This patch makes the SATA clock as half of CSB clock.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not. Also added a warning message if the
all the secondary cpus we expect don't spin up.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch reworks the default environment on Kilauea/Haleakala. Now
"net_nfs" for exmaple uses the device-tree style booting formerly know
as "net_nfs_fdt". Also the addresses in RAM were changed because of the
new image booting support, which check for image overwriting. So the
addresses needed togeet adjusted.
Signed-off-by: Stefan Roese <sr@denx.de>
Since the new image support checks for image overwriting, the default
environment needs to get adjusted to use correct addresses.
Signed-off-by: Stefan Roese <sr@denx.de>
The patch 70431e8a73 (Make MPC83xx one step
closer to full relocation.) doesn't use CFG_MONITOR_BASE anymore. But
on 4xx systems _start currently cannot be used for this calculation.
So revert back to the original version for now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.
Signed-off-by: Stefan Roese <sr@denx.de>
fdt.c: In function 'ft_cpu_setup':
fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The fdt set command was treating properties specified as <00> and <0011>
as byte streams, rather than as an array of cells. As we already have
syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
we should use the <> syntax to describe arrays of cells, which are always
32-bits per element. If we imagine this likely (IMHO) scenario:
> fdt set /ethernet-phy@1 reg <1>
With the old code, this would create a bad fdt, since the reg cell would be
made to be one byte in length. But the cell must be 4 bytes, so this would
break mysteriously.
Also, the dts spec calls for constants inside the angle brackets (<>)
to conform to C constant standards as they pertain to base.
Take this scenario:
> fdt set /ethernet@f00 reg <0xe250000\ 0x1000>
The old fdt command would complain that it couldn't parse that. Or, if you
wanted to specify that a certain clock ran at 33 MHz, you'd be required to
do this:
> fdt set /mydev clock <1f78a40>
Whereas the new code will accept decimal numbers.
While I was in there, I extended the fdt command parser to handle property
strings which are split across multiple arguments:
> fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
> fdt p /ethernet@f00
ethernet@f00 {
interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
};
Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.
Signed-off-by: Stefan Roese <sr@denx.de>
finish off what commit 43ddd9c820,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch makes SPARC/LEON processors able to read and write
to the SMC91111 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.
To access that I/O bus one must set up the memory controller
(MCTRL or FTMCTRL) correctly. It is assumed that the user sets
up this correctly when the other MCTRL parameters are set up. It
can be set up from the board configuration header file.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 2 of the replacement: more header imports and edits.
Signed-off-by: Stelian Pop <stelian@popies.net>
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 1 of the replacement: pristine header files import.
Signed-off-by: Stelian Pop <stelian@popies.net>
AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.
Signed-off-by: Stelian Pop <stelian@popies.net>
The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
the board, so use timer_init() instead of interrupt_init().
Signed-off-by: Stelian Pop <stelian@popies.net>
DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
When the version_string function in start.S is not 4-byte align,
it will cause the compiler generates "unaligned opcodes detected
in executable segment". This issue affects all ColdFire CPUs.
By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
it is not aligned.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.
Cleanup pci_target_init.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Many Atmel boards have no "real" (NOR) flash on board, and rely only
on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
be present in a board configuration file, while still enabling flash
commands like 'flinfo', 'protect', etc.
Signed-off-by: Stelian Pop <stelian@popies.net>
This punts the old spi flash driver for a new/generalized one until the
common one can be integrated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add some missing ARM boards to MAKEALL. These build correctly,
unlike several of the boards already listed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.
If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.
Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.
For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.
Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.
It also makes the board take MAC addresses, if found, from EEPROM.
User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr. Any unused addresses should be zero. This group of
four six-byte values should have it's CRC at the end. crc32 and
eeprom commands can be used to accomplish this.
If CRC fails, MAC addresses come from the environment. If CRC
succeeds, the environment is overwritten at startup.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 55774b512f broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
in the spirit of commit 1ced121600,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to
mem_*_clk for consistency's sake.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.
The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.
8377E: LYNX1- 2 SATA LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA LYNX2- 2 SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.
Signed-off-by: Stefan Roese <sr@denx.de>
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback
Signed-off-by: Tor Krill <tor@excito.com>
R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch add support PCI of SuperH base code and SH7780 specific code.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SH7780 is CPU of Renesas Technology.
This CPU has
- CPU clock 400MHz
- PCI support
- DDR-SDRAM controller
- etc ...
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.
We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:
(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;
(2) a new memory map for the registers in the board's CPLD;
(3) a revised format for manufacturer's data in serial EEPROM; and
(4) changes to track updates to U-Boot for the Sequoia board.
Signed-off-by: Larry Johnson <lrj@acm.org>
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.
Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.
Signed-off-by: Stefan Roese <sr@denx.de>
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.
This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:
CHIP_11: End of memory range area restricted access.
Category: 3
Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.
Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.
Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.
This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia
The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:
PMC440.h:
/* esd expects pram at end of physical memory.
* So no logbuffer at the moment.
*/
It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.
Signed-off-by: Stefan Roese <sr@denx.de>
The routine ft_board_setup() configures the EBC NOR mappings for the
Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
problem, we need to pass the corrected address here too.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the AMCC Glacier 460GT eval board.
The main difference to the Canyonlands board are listed here:
- 4 ethernet ports instead of 2
- no SATA port
- no USB port
Currently EMAC2+3 are not working. This will be fixed in a later
release.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently U-Boot building in some external directory
doesn't work. This patch tries to fix the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
the I2C bus speed. Current 8[356]xx boards define the CFG_I2C_SPEED macro,
but fsl_i2c.c ignores it and uses conservative value when programming the
I2C bus speed.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.
The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support
Signed-off-by: Dave Liu <daveliu@freescale.com>
original ata_piix driver is using IDE framework, not real
SATA framework. For now, the ata_piix driver is only used
by x86 sc520_cdp board. This patch makes the ata_piix driver
use the new SATA framework, so
- remove the duplicated command stuff
- remove the CONFIG_CMD_IDE define in the sc520_cdp.h
- add the CONFIG_CMD_SATA define to sc520_cdp.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
move the cmd_sata.c from common/ to drivers/ata_piix.c,
the cmd_sata.c have some part of ata_piix controller drivers.
consolidate the driver to have better framework.
Signed-off-by: Dave Liu <daveliu@freescale.com>
f6b44e0e4d that will cause usb_stor_info
to only print only information on one storage device, but not for
multiple.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Provide a board_lmb_reserve helper function to ensure we reserve
the page of memory we are using for the boot page translation code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The following changes are needed to be inline with ePAPR v0.81:
* r4, r5 and now always set to 0 on boot release
* r7 is used to pass the size of the initial map area (IMA)
* EPAPR_MAGIC value changed for book-e processors
* changes in the spin table layout
* spin table supports a 64-bit physical release address
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed. And CONFIG_ defines were added
to various board config files to make sure that happens.
The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.
Boards that are CDS specific were renamed with cds_ prefix.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
called. However, get_sys_info() recalculates extraneous information when
called each time. Have get_ddr_freq() and get_bus_freq() return memoized
values from global_data instead.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Show the DDR memory data rate in addition to the memory clock
frequency. For DDR/DDR2 memories the memory data rate is 2x the
memory clock.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t. Fix
rounding of result to nearest; previously it was rounding
upwards.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
FSL has taken to using SVR[16:23] as an SOC sub-version field. This
is used to distinguish certain variants within an SOC family. To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value. We also add SVR numbers for all
of the current variants. Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.
Added support for using the ePAPR defined spin-table mechanism on 85xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.
Added support for using the ePAPR defined spin-table mechanism on 85xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.
For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
This patch changes the "usb storage" command to return success if it
finds a USB storage device, otherwise it returns error.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
RTL8211B sets link state register after autonegotiation complete,
so with bootdelay=0 RTL8211B will report lack of the link.
To fix this, we should wait for aneg to complete, even if the
link is currently down.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
device_type = "soc" is being deprecated, newer device trees will use
"fsl,soc" and/or "fsl,immr" for the soc nodes.
This patch also adds clock-frequency property for soc nodes (the same
value as bus-frequency).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
With the original value of 1/2 clock cycle delay, the system ran relatively
stable except when we run benchmarks that are intensive users of memory.
When I run samba connected disk with a HDBENCH test, the system locks-up
or reboots sporadically.
Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.
Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.
Signed-off-by: Scott Wood <scottwood@freescale.com>
At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
This patch fixes "system time drifting" problem.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Plus modify environment to use it and remove bootfile env variable,
it is internal and CONFIG_BOOTFILE is used for these purposes.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Current DDR setup easily causes memory corruption, this patch fixes it.
Also fix TIMING_CFG0_MRS_CYC definition.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch adds basic support for Broadcom BCM5481 PHY.
RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
Peter Barada <peterb@logicpd.com>.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
switch to enable this setting.
The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
previously.
5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards. A small firwmare must be uploaded to its on-board memory
before it can be enabled. This patch adds the code which uploads firmware
(but not the firmware itself).
Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs. The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob. The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).
The only board that enables these is the stxxtc and they don't appear
to be used by linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.
Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
AX88796L is device of NE2000 compatible.
This patch support AX88796L ethernet device.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
There are more devices of the NE2000 base.
A present code is difficult for us to support more devices.
To support more NE2000 clone devices, separated the function.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the "ssync" instruction may have hardware anomalies associated with
it, have the smc91111 driver use the SSYNC macro rather than invoking it
directly. We workaround all the anomalies via this macro.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capble of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a simple expr style command that will set an env variable as the result
of the command. This allows us to do simple math in shell. The following
operations are supported: &, |, ^, +, -, *, /.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.
In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.
But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.
Other problems:
Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.
And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.
For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.
This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.
If we don't have any regression report through several releases, then
we'll remove codes entirely.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Andrew Dyer <amdyer@gmail.com>
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
run on the board, then the SYSMON POST controls the display backlight
(doesn't switch backlight ON if POST FAILED, and does switch the
backlight ON if PASSED).
If not, then the video driver controls the display backlight (just
switch ON the backlight upon initialization).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.
When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
Disable default building of new uImage format support in preparation
for merge with the master. Support for new format can be enabled on
a per-board basis, by defining the following in the board's config file:
#define CONFIG_FIT 1
#define CONFIG_OF_LIBFDT 1
This can be optionally defined to give more verbose output:
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
include/config_cmd_default.h. Fix few warnings and handling of new format
images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
and so on).
The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.
The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
- insert partition for dtb blob to TQM5200B MTD layout
- set env variables dependent on the configured board
(TQM5200 or TQM5200B)
Signed-off-by: Martin Krause <martin.krause@tqs.de>
With this patch we don't need that many #ifdef's in the code. It moves
the subtraction into the macro and defines a NOP-macro when
CONFIG_FLASH_SHOW_PROGRESS is not defined.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Since fdt_node_offset_by_compatible() was converted to the new
fdt_next_node() iterator, a chunk of initialization code became
redundant, but was not removed by oversight. This patch cleans it up.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Currently the CHECK_HEADER() macro is defined local to fdt_ro.c.
However, there are a handful of functions (fdt_move, rw_check_header,
fdt_open_into) from other files which could also use it (currently
they open-code something more-or-less identical). Therefore, this
patch moves CHECK_HEADER() to libfdt_internal.h and uses it in those
places.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
fdt_add_subnode_namelen() has a bug if asked to add a subnode to a
node which has NOP tags interspersed with its properties. In this
case fdt_add_subnode_namelen() will put the new subnode before the
first NOP tag, even if there are properties after it, which will
result in an invalid blob.
This patch fixes the bug, and adds a testcase for it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth. This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds an fdt_set_name() function to libfdt, mirroring
fdt_get_name(). This is a r/w function which alters the name of a
given device tree node.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Backlight was switched on even when temperature was too low.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Backlight was switcehd on even when temperature was too low.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory),
the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ...,
PPC440EPX_GPT0_COMP5).
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
marked as POST_CRITICAL fails then the alternative, post_critical,
boot-command is used. If this command is not defined then U-Boot
enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
The parallel flash on the BF537-STAMP is CFI compliant, so there is no need
for the board specific driver at all. Just use the common CFI driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Stop tying things to the processor that should be tied to other defines and
change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
system to select the -mcpu option.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This moves the Blackfin-common bootldr command out of the BF537-STAMP
specific board directory and into the common directory so that all Blackfin
boards may utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds CFG_OHCI_USE_NPS to the common USB-OHCI driver. This
way a board just needs to define this new option to enable the "force
NoPowerSwitching mode" instead of adding new CPU/architecture defines
to the USB source itself.
This new option will be used first with the new AMCC 460EX Canyonlands
board port, which will be posted in a few days.
This patch also fixes a small compilation problem when DEBUG is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.
This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.
Tested with 512 byte page NAND device (32MByte) on Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is a rework of the 4xx interrupt handling done while
adding the 460EX/GT support. Interrupts are needed on 4xx for the
EMAC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).
Signed-off-by: Stefan Roese <sr@denx.de>
Cleanup: Remove custom flash driver for 8 bit boot-eprom and replace it with
the FLASH_CFI_LEGACY et al. config options.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
MD5 supoprt is turned on by defining CONFIG_MD5, the digest can be then
calculated using the md5() function -- see include/md5.h for details.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Change the automatic local version to have the form -nnnnn-gSHA1SUMID,
where 'nnnnn' is the number of commits since the last tag (i.e.,
1.3.2-rc3). This makes it much easier to recognize "newer" versions
and to see how much has been changed since the referenced tag.
Stolen from Linux kernel's scripts/setlocalversio, see commit d882421f.
Signed-off-by: Wolfgang Denk <wd@denx.de>
verify, autostart and lmb fields are used regardless of CONFIG_FIT
setting, move their definitions to common section.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Save FIT configuration provied in the first bootm argument and use it
when to get ramdisk/FDT subimages when second and third (ramdisk/FDT)
arguments are not specified.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch allocates a set of show_boot_progress() IDs for new uImage format
and adds show_boot_progress() calls in new uImage format handling code.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
autoscript() routine is updated to accept second argument, which
is only used for FIT images and provides a FIT subimage unit name.
autoscript() routine callers must now pass two arguments. For
non-interactive use (like in cmd_load.c, cmd_net.c), new environment
variable 'autoscript_uname' is introduced and used as a FIT
subimage unit name source.
autoscript command accepts extended syntax of the addr argument:
addr:<subimg_uname>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch updates architecture specific implementations of
do_bootm_linux() adding new uImage format handling for
operations like get kernel entry point address, get kernel
image data start address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch adds new node offset fields to struct bootm_headers
and updates bootm_headers processing code to make use of them.
Saved node offsets allow to avoid repeating fit_image_get_node() calls.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for new (FIT) format uImages is added to powerpc specific
boot_get_fdt() routine which now recognizes, sanity checks FIT image
and is able to access data sections of the requested component image.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Re-enable interrupts if we return from do_bootm_<os> and 'autostart'
environment variable is not set to 'yes'.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
boot_get_ramdisk() and image_get_ramdisk() do not need all
cmdtp, flag, argc and argv arguments. Simplify routines definition.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch updates boot_get_ramdisk() routine adding format
verification and handling for new (FIT) uImages.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
New format uImages are recognized by the bootm command,
validity of specified kernel component image is checked and
its data section located and used for further processing
(uncompress, load, etc.)
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for the new uImage format (FIT) is added to mkimage tool.
Commandline syntax is appropriately extended:
mkimage [-D dtc_options] -f fit-image.its fit-image
mkimage (together with dtc) takes fit-image.its and referenced therein
binaries (like vmlinux.bin.gz) as inputs, and produces fit-image file -- the
final image that can be transferred to the target (e.g., via tftp) and then
booted using the bootm command in U-Boot.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Add FDT-based functions for handling new format component images,
configurations, node operations, property get/set, etc.
fit_ - routines handling global new format uImage operations
like get/set top level property, process all nodes, etc.
fit_image_ - routines handling component images subnodes
fit_conf_ - routines handling configurations node
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
When rtl_recv() of rtl8169 is called, OWNbit of status register
is not enable occasionally.
rtl_recv() doesn't work normally when the driver doesn't do
appropriate processing.
This patch fix this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
the dts file basenames were updated in linux - this helps avoid
inadvertently loading any old dtbs laying around.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
allow u-boot to recover (and, e.g., switch to another interface) in the
case where a PHY does not report autonegotiation is complete within its
two second timeout value.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The taihu board used gpio_read_out_bit which reads the output register and not
the pin state.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
1. Make the CSB bus pipeline depth as 4, and enable
the repeat mode;
2. Raise the eTSEC emergency priority;
3. Use the highest IP blocks clock.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The latter version stops when "run load" fails for whatever reasons
rendering the combination *a lot* more secure.
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch fixes a problem seen on PPC4xx boards, when no MAC address is
defined. Then no ethernet interface is available but a simple "tftp"
command will return without any error message which is quite confusing.
Signed-off-by: Stefan Roese <sr@denx.de>
Many of the spd.h #includers don't need it,
and wanted to have spd_sdram() declared instead.
Since they didn't get that, some also had open
coded extern declarations of it instead or as well.
Fix it all up by using spd_sdram.h where needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch fixes a problem seen on PPC4xx boards, when no MAC address is
defined. Then no ethernet interface is available but a simple "tftp"
command will return without any error message which is quite confusing.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 5013c09f (Makefile: cleanup "clean" target) introduced a
problem for out-of-tree builds which caused "make clean" to fail.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Every now and then a Sequoia board (or equivalent hardware) had
problems connecting to a Gigabit capable network interface.
There were differences in the PHY setup between Linux and U-Boot.
This patch fixes the problem. Apparently "remote fault" is being set,
which signals to some devices (on the other end of the cable) that a
fault has occurred, while other devices ignore it. I believe the RF bit
was causing the issue, but I removed T4 also, to match up with Linux.
Signed-off-by: Mike Nuss <mike@terascala.com>
Fix a typo in qe_upload_firmware() that prevented uploading firmware on
systems with more than one RISC core.
Signed-off-by: Timur Tabi <timur@freescale.com>
If I try to "cp.b <ram> <dataflash>", u-boot selects normal flash
routines instead of dataflash. This is because it checks "if source
address is not dataflash" instead of target address.
Signed-off-by: Kim B. Heino <Kim.Heino@bluegiga.com>
This fixes the cluster size tests in the FAT32 file system.
The current implementation of VFAT support doesn't work if the
referred cluster has an offset > 16bit representation, causing
"fatload" and "fatls" commands etc. to fail.
Signed-off-by: michael trimarchi <trimarchi@gandalf.sssup.it>
The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But
currently 4k/2k is configured. This patch fixes this issue.
Thanks to Thomas Kindler <tkindler@lenord.de> for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix alignment fault on ARM when running modules. With out an explicit
linker file gcc4.2.1 will half word align __bss_start's value. The word
dereference will crash hello_world.
signed-off-by Richard Woodruff <r-woodruff2@ti.com>
erratum 5.6 states the autoneg completion bit is functional only if the
autoneg bit is asserted.
This fixes any secondarily-issued networking commands on non-gigabit
links on the mpc8360 mds board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Adds PCI support for MPC5121
Tested with drivers/net/rtl8139.c
Support is conditional since PCI on old silicon does not work.
ads5121_PCI_config turns on PCI
In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: John Rigby <jrigby@freescale.com>
U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is
enabled. To reproduce the problem ensure that 'ethrotate'
environment variable isn't set to "no" and then run
"tftp 200000 not_existent_file".
This patch tries to fix the issue.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently (since commit b2e2142c) u-boot crashes on
sequoia board while SPR test if CONFIG_4xx_DCACHE is
enabled. This patch disables the cache while SPR test.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
TB5200 and TB5200_B to fixup the /memory node with the memory values
detected by U-Boot.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
TB5200 and TB5200_B to fixup the /memory node with the memory values
detected by U-Boot.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
This patch fixes a bug in the SDRAM initialization code for the
TQM5200. The hi_addr bit is now set correctly. Without this patch
the hi_addr bit is always set to 1, if the second SDRAM bank is
not populated.
For other MPC5200 boards a correspondig patch has already been applied
some time ago, see commit a63109281a.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
--
Forget the first patch please. I confused flash with SDRAM in
the comment ...
The previous patch was lacking of i386, microblaze, nios and nios2. This
patch tries to fix them.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth. This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Use uint32_t when accessing size table in image_multi_count() and
image_multi_getimg() for multi component images.
Add missing uimage_to_cpu() endianness conversion.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch adds the following common routines:
1) Dedicated mkimage print_header() is replaced with common
image_print_contents()
image_print_contents_noindent()
2) Common os/arch/type/comp fields name <--> id translation routines
genimg_get_os_name()
genimg_get_arch_name()
genimg_get_type_name()
genimg_get_comp_name()
genimg_get_os_id()
genimg_get_arch_id()
genimg_get_type_id()
genimg_get_comp_id()
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch introduces the following prefix convention for the
image format handling and bootm related code:
genimg_ - dual format shared code
image_ - legacy uImage format specific code
fit_ - new uImage format specific code
boot_ - booting process related code
Related routines are renamed and a few pieces of code are moved around and
re-grouped.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Allow the user to set 'bootm_low' and 'bootm_size' env vars as a way
to restrict what memory range is used for bootm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Convert generic ramdisk_high(), get_boot_cmdline(), get_boot_kbd()
functions over to using lmb for allocation of the ramdisk, command line
and kernel bd info.
Convert PPC specific fdt_relocate() to use lmb for allocation of the device
tree.
Provided a weak function that board code can call to do additional
lmb reserves if needed.
Also introduce the concept of bootmap_base to specify the offset in
physical memory that the bootmap is located at. This is used for
allocations of the cmdline, kernel bd, and device tree as they should
be contained within bootmap_base and bootmap_base + CFG_BOOTMAPSZ.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The autostart env variable was dropped as part of the initial new uImage
cleanup. Add it back here so the arch specific code can decide if it
wants to really boot or not.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Introduce the LMB lib used on PPC in the kernel as a clean way to manage
the memory spaces used by various boot images and structures. This code
will allow us to simplify the code in bootm and its support functions.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capable of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Changed image_get_ramdisk() to just return NULL on error and have
get_ramdisk() propogate that error to the caller. It's left to the
caller to call do_reset() if it wants to.
Also moved calling do_reset() in get_fdt() and fdt_relocate() on ppc
to a common location. In the future we will change get_fdt() and
fdt_relocate() to return success/failure and not call do_reset() at all.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Doing the fdt before the ramdisk allows us to grow the fdt w/o concern
however it does mean we have to go in and fixup the initrd info since
we don't know where it will be.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we are bootin OF style than we can skip setting up some things
that are used for the old boot method.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
We don't actually need the kdb param as we are just using it to get
bd->bi_memsize which we can get from gd->bd->bi_memsize. Also, if we
boot via OF we might not actually fill out a kdb.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
There is no reason to icbi when invalidating the temporary stack in
the d-cache. Its impossible on e500 to have the i-cache contain
any addresses in the temp stack and it can be problematic in generating
transactions on the bus to non-valid addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The source vector for the ECM was being set to 2,
but that's what the source vector for DDR was being
set to. Change it to 1.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Commit 0db37dc... (and some others) changed the INIT_RAM TLB
mappings to be unguarded. This collided with an existing "bug"
where the mappings for the INIT_RAM were being kept around.
This meant that speculative loads to those addresses were
succeeding in the TLB, and going out to the bus, where they
were causing an exception (there's nothing at that address). The
Flash code was coincidentally causing such a speculative load.
Rather than go back to mapping the INIT RAM as guarded, we fix
it so that the entries for the INIT_RAM are invalidated. Thus
the speculative loads will fail in the TLB, and have no effect.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Dual format image code must properly handle all three FDT passing methods:
- raw FDT blob passed
- FDT blob embedded in the legacy uImage
- FDT blob embedded in the new uImage
This patch enables proper raw FDT handling when no FIT imaeg support
is compiled in. This is a bit tricky as we must dected FIT format even
when FIT uImage handling is not enabled as both FIT uImages and raw FDT
blobs use tha same low level format (libfdt).
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
FDT blob may be passed either: (1) raw (2) or embedded in the legacy uImage
(3) or embedded in the new uImage. For the (2) case embedding image must be
verified before we get FDT from it. This patch factors out legacy image
specific verification routine to the separate helper routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Legacy image specific verification is factored out to a separate helper
routine to keep get_kernel() generic and simple.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Do not pass image verification flag directly to related routines.
Simplify argument passing and move it to the bootm_header structure which
contains curently processed image specific data and is already being passed
on the argument list.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
When CONFIG_HAS_DATAFLASH is not defined gen_get_image() routine has nothing
to do, update its control flow to better reflect that simple case.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
PPC specific FDT blob handling code is divided into two separate routines:
get_fdt() - find and verify a FDT blob (either raw or image embedded)
fdt_relocate() - move FDT blob to within BOOTMAP if needed
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Back in commit a551cee99a
(86xx: Fix GUR PCI config registers properly), we should have
changed the MPC86xx_PORBMSR_HA and MPC86xx_PORDEVSR_IO_SEL
symbols in the sbc8641d board as well. Fix this oversight.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Don't include testdram() on NAND-booting target acadia_nand. This saves
a few bytes and makes the target build clean again.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds framework for dual format images. Format detection is added
and the bootm controll flow is updated to include cases for new FIT format
uImages.
When the legacy (image_header based) format is detected appropriate
legacy specific handling is invoked. For the new (FIT based) format uImages
dual boot framework has a minial support, that will only print out a
corresponding debug messages. Implementation of the FIT specific handling will
be added in following patches.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
----------------------------------------------------------------
Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)]
Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on
32bit targets.
GCC can be made to warn about usage of long long types with ISO C90
(-ansi), but only with -pedantic. You can write this in a way that even
then it doesn't cause warnings, namely by:
#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#endif
The __extension__ keyword in front of this switches off any pedantic
warnings for this expression.
Signed-off-by: Olaf Hering <olh@suse.de>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
----------------------------------------------------------------
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This reduces the build time by ~10%. Here's the gth2_config example.
BEFORE AFTER
real 0m31.441s 0m27.833s
user 0m24.766s 0m23.045s
sys 0m10.425s 0m7.468s
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
In the thread "[1.3.2-rc1] MPC8548CDS/MPC8555CDS configs fails to link",
the define2mk.sed script was identified as the source of the link
failure on FreeBSD. The problem is that sed(1) does not always support
the '+' operator. It isn't on FreeBSD. The attach patch implements the
equivalent, using the '*' operator instead and should work everywhere.
Signed-off-by: Marcel Moolenaar <marcelm@juniper.net>
The Linux commit fac8b209b1084bc85748bd54e13d00c1262b220f ("Remove
final traces of long-deprecated "ramdisk" kernel parm") makes these
changes neccessary.
Signed-off-by: Detlev Zundel <dzu@denx.de>
When the LM75 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
256 C too high. This patch fixes the problem.
Signed-off-by: Larry Johnson <lrj@acm.org>
Some boards (e.g. lwmon5) may use rather small watchdog intervals, so
causing it to reboot the board if U-Boot does a long busy-wait with
udelay(). Thus, for these boards we have to restart WD more
frequently.
This patch splits the busy-wait udelay() into smaller, predefined,
intervals, so that the watchdog timer may be resetted with the
configurable (CONFIG_WD_PERIOD) interval.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Adds configuration option for ATI Radeon 9200 card
support to sequoia config file. If CONFIG_VIDEO
is enabled, TEXT_BASE should be changed to 0xFFF80000.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capable of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This bumps the autoconf.mk include step above board/cpu/arch/etc... so that
those .mk files can have make if statements based on the current config.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If any of the steps for generating autoconf.mk fail currently, they go
unnoticed. To fix, we can simply add 'set -e' to the long list of commands.
This is simpler and more robust than placing '|| exit $$?' after every line.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
By adding VERSION_FILE to the PHONY targets the script
/tools/setlocalversion is always called and version_autogenerated.h
is replaced only if the script find a modified source file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
- Fix flash_init call when CFG_NO_FLASH is used
- Remove no more needed flash.c for qemu-mips
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Michael Hennerich added support for outputting an image in RGB format rather
than forcing YUYV all the time. This makes obvious sense if the display you
have takes RGB input rather than YUYV.
Rather than hack in support for options, I've converted it to use getopt and
cleaned up the argument parsing in the process.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the $(LDSCRIPT) does not exist (normally it's board/$(BOARD)/u-boot.lds),
then change into the board directory and try and create it. This allows you
to generate the linker script on the fly based upon board defines (like the
Blackfin boards do).
There should be no regressions due to this change as the normal case is to
already have a u-boot.lds file. If that's the case, then there's nothing to
generate, and so make will always exit. The fix here is that if the linker
script does not exist, the implicit rules take over and attempt to guess how
to generate the file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Introducing routines for parsing new uImage format bootm arguments:
[<addr>]#<conf> - configuration specification
[<addr>]:<subimg> - subimage specification
New format images can contain multiple subimages of the same type. For example
a single new format image file can contain three kernels, two ramdisks and a
couple of FDT blobs. Subimage and configuration specifications are extensions
to bootm (and other image-related commands) arguments' syntax that allow to
specify which particular subimage should be operated on.
Subimage specification is used to denote a particular subimage. Configurations
are a bit more complex -- they are used to define a particualr booting setup,
for example a (kernel, fdt blob) pair, or a (kernel, ramdisk, fdt blob) tuple,
etc.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This routine assures that image (whether legacy or FIT) is not
in a special dataflash storage.
If image address is a dataflash address image is moved to system RAM.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
New uImage format (Flattened Image Tree) requires libfdt
functionality, print out error message if CONFIG_OF_LIBFDT
is not defined.
New uImage support is enabled by defining CONFIG_FIT (and CONFIG_OF_LIBFDT).
This commit turns it on by default.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Do not use uninitialized cmd_reset; issue both AMD and Intel reset
commands instead
From a short test, it looks like AMD-style flash roms treat *any* unknown
command write as a reset, at least when in CFI Query mode, so issuing the
Intel reset command to AMD-style flashs seems safe (from the small sample I
have), plus the 3-cycle magic sequence should kick the state machine into
the right state even without a reset command. Since the AMD-style flashs
require the unlock sequence for real operation, I chose to try the AMD reset
command first, so that Intel flashs do no see an invalid command prior to
the CFI query.
I have tested the patch on AM29LV320-style flashs from Fujitsu and Macronix,
plus Intel StrataFlash.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the
ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered
by it. The gcc-4.2 with its more aggressive optimization exposes this fact.
This patch just saves the CR value before running the test code, so allowing
it to do anything it wants with CR.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
--
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't. Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.
My bad. Lovely Wednesday with git bisect. You know.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Without an actual supported video card hooked up, enabling
the CONFIG_VIDEO by default just makes it look broken by
routing all console output to the video card. Don't.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars. Fix this by removing the 85xx cruft from the
86xx codebase.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is the proper fix for a missing closing brace in the function
ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
The ft_cpu_setup() function in mpc8641hpcn.c should have been
removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
but was missed. Only, the sbc8641d was nominally still using it.
It all got ripped out, and the funcality that was in ft_board_setup()
was refactored to remove the CPU portions into the new file
cpu/mpc86xx/fdt.c instead. Make sbc8641d use this now.
Based loosely on an original patch from joe.hamman@embeddedspecialties.com
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The option CONFIG_I2C_MULTI_BUS does not have any effect on Sequoia, the
PPC440EPx reference platform, because IIC1 is never enabled. Add Sequoia board
code to turn on IIC1 if CONFIG_I2C_MULTI_BUS is selected.
Signed-off-by: Mike Nuss <mike@terascala.com>
Cc: Stefan Roese <sr@denx.de>
This patch tries to get rid of some assembler warnings about
changed .got2 section type while compiling x86 bios emulator
code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch extends PCI device id table of the
radeon driver so that the driver will also support
Radeon Mobility 9200 (M9+) based boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Constantly rebuilding the version header will force useless relinking, so we
simply need to compare the new header with the existing one before updating
it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
Update the get_clocks() function in 85xx and 86xx to determine the I2C
clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
Signed-off-by: Timur Tabi <timur@freescale.com>
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.
Use r2 instead.
Signed-off-by: Wolfgang Denk <wd@denx.de>
If the variable "machid" exists, let do_bootm_linux use that instead
of bd->bi_arch_number.
Signed-off-by: Uwe Kleine-Knig <Uwe.Kleine-Koenig@digi.com>
Current MII_DEBUG is confusing in two ways. One is useless define-then-
undef at the top of the file. The other is there is only one debug() in
this file, and that doesn't seem worthwhile to bother having MII_DEBUG.
While there are many useful printf()/puts() debug codes, but they are for
DEBUG, not for MII_DEBUG.
This patch tries to put them all together into MII_DEBUG and debug().
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch enables the OneNAND boot within U-Boot.
Before this work, we used another OneNAND IPL called X-Loader based
on open source. With this work, we can build the oneboot.bin image
without other program.
The build sequence is simple.
First, it compiles the u-boot.bin
Second, it compiles OneNAND IPL
Finally, it becomes the oneboot.bin from OneNAND IPL and u-boot.bin
The mechanism is similar with NAND boot except it boots from itself.
Another thing is that you can only use the OneNAND IPL only to work
other bootloader such as RedBoot and so on.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
A #if statement in fat.c depended on CONFIG_MMC, instead of
defined(CONFIG_MMC). This meant CONFIG_MMC needed to be defined
as "1" rather than just defined. Now it's better.
Signed-off-by: Andy Fleming <afleming@freescale.com>
---------------------------------
read_dataflash() takes a signed char pointer as a parameter. Silence a
few warnings dues to incorrect parameter types in env_dataflash.c.
Signed-off-by: Stelian Pop <stelian@popies.net>
Fix arm926ejs compile when SKIP_LOWLEVEL_INIT is on.
cpu/arm926ejs/start.o: In function `cpu_init_crit':
.../cpu/arm926ejs/start.S:227: undefined reference to `lowlevel_init'
Signed-off-by: Stelian Pop <stelian@popies.net>
Remove the "#undef DEBUG" line from all Freescale 83xx board header files.
The inclusion of this line makes it impossible to enable debug code in
other source files, because "#define DEBUG" typically needs to be defined
before any header files are included.
Signed-off-by: Timur Tabi <timur@freescale.com>
Move the flat device tree setup for QE related devices into
a common file shared between 83xx & 85xx platforms that have QE's.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Verification of the kernel image (in old format) and finding kernel
data is moved to a dedicated routine. The routine will also hold
support for, to be added, new image format.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Move FDT blob finding and relocation to a dedicated
get_fdt() routine. It increases code readability and
will make adding support for new uImage format easier.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch moves common pre-boot allocation steps shared between PPC
and M68K to a helper routines:
common:
- get_boot_sp_limit()
- get_boot_cmline()
- get_boot_kbd()
platform:
- set_clocks_in_mhz()
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Ramdisk loading code, including initrd_high variable handling,
was duplicated for PPC and M68K platforms. This patch creates
common helper routine that is being called from both platform
do_bootm_linux() routines.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Microblaze do_bootm_linux() includes ramdisk processing code but
the ramdisk does not get used anywhere later on.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Architecture specific do_bootm_linux() routines share common
ramdisk image processing code. Move this code to a common
helper routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
FDT error handling in PPC do_bootm_linux() shares the same message format.
This patch moves error message printing to a helper fdt_error() routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Move numeric-id to name translation for image os/arch/type/comp header
fields to a helper routines: image_get_os_name(), image_get_arch_name(),
image_get_type_name(), image_get_comp_name().
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Standalone applications are supposed to be run using the "go" command.
This patch removes standalone images handling from the do_bootm().
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for OF_FLAT_TREE is to be obsoleted in the near future,
remove related code from the bootm routines.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Implementation of the do_bootm_linux() and other bootm helper routines is
architecture specific code. As such it resides in lib_<arch> directories
in files named <arch>_linux.c
This patch renames those files to a more clear and accurate
lib_<arch>/bootm.c form.
List of the renamed files:
lib_arm/armlinux.c -> lib_arm/bootm.c
lib_avr32/avr32_linux.c -> lib_avr32/bootm.c
lib_blackfin/bf533_linux.c -> lib_blackfin/bootm.c
lib_i386/i386_linux.c -> lib_i386/bootm.c
lib_m68k/m68k_linux.c -> lib_m68k/bootm.c
lib_microblaze/microblaze_linux.c -> lib_microblaze/bootm.c
lib_mips/mips_linux.c -> lib_mips/bootm.c
lib_nios/nios_linux.c -> lib_nios/bootm.c
lib_nios2/nios_linux.c -> lib_nios2/bootm.c
lib_ppc/ppc_linux.c -> lib_ppc/bootm.c
lib_sh/sh_linux.c -> lib_sh/bootm.c
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Check for overwrites during image move/uncompress, return with error
when the original image gets corrupted. Report clear message to the user
and prevent further troubles when pointer to the corrupted images is passed
to do_bootm_linux routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- use single image header pointer instead of a set of auxilliary variables.
- add multi component image helper routines: get component size/data address
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- sort and cleanup headers, declarations, etc.
- group related routines
- cleanup indentation, white spaces
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
I386 targets are not using a uImage format, instead fake header
is added to ram image before it is further processed by bootm.
Remove this fixup and force proper uImage use for I386.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
CHUNKSZ defined for PPC and M68K is set to the same value of 64K,
move this definition to a common header.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Move gunzip(), zalloc() and zfree() to a separate file.
Share zalloc() and zfree() with cramfs uncompress routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Make CONFIG_OF_LIBFDT and CONFIG_OF_FLAT_TREE use more
readable in PPC variant of do_bootm_linux() routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- Add inline helper macros for basic header processing
- Move common non inline code common/image.c
- Replace direct header access with the API routines
- Rename IH_CPU_* to IH_ARCH_*
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Changes to match 5121 device tree going mainline in 2.6.25.
Change OF_SOC from "soc5121" to plain "soc".
Remove unneeded "ref-frequency" fixups.
Remove "address" enetaddr fixup.
Add bus-frequency fixup for old OF_SOC so old
kernels with old device trees will work with new
u-boot with 66MHz IPS clock
Signed-off-by: John Rigby <jrigby@freescale.com>
Move the flat device tree setup for QE related devices into
a common file shared between 83xx & 85xx platforms that have QE's.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.
Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.
Big thanks to Gerhard Berghofer for pointing out this issue.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The (now obsolete) atngw100 flash programming code was having problems
programming the onboard at49bv642 chip. The atstk1000 flash
programming code may have the same bug, so import fix for this problem
from the AVR32 Linux BSP.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The default load address is SDRAM + 2MB, not SDRAM + 4MB. The latter
wouldn't have worked anyway since the board can only access 4MB of
SDRAM.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Many people run into problems when they compile a big kernel and load
the uImage at the default SDRAM + 2MB address as the kernel will
overwrite the uImage as it is being unpacked. Increase the default
load address so that we can load a 4MB kernel image without any
problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
allow to use a different server as set in serverip
add CONFIG_TFTP_FILE_NAME_MAX_LEN to configure the file name length
if not defined the max length will be at 128
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
Update the get_clocks() function in 85xx and 86xx to determine the I2C
clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
Signed-off-by: Timur Tabi <timur@freescale.com>
According to the OMAP5912 Serial Interfaces Reference Guide (see
http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the
FIFO_EN enable bit in the FIFO Control Register (FCR) can only be
changed when the baud clock is not running, i. e. when both DLL and
DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch allows us to use the 'gd' pointer (and thus environment
and everything else associated with it) from interrupt context on
arm920t.
Signed-off-by: Harald Welte <laforge@openmoko.org>
This patch adds a IRQ demultiplexer callback to the arm920 cpu core code,
plus a stub implementation of it for the S3C2410.
The purpose is to allow arm920t implementations such as the s3c24x0 to
implement interrupt handlers in u-boot without having to touch core
arm920t code.
Signed-off-by: Harald Welte <laforge@openmoko.org>
Add ifdef to bdinfo command to display ethernet information
only if CONFIG_CMD_NET is defined for arm modules.
Signed-off-by: K R Gururaja Hebbar <gururajakr@sanyo.co.in>
Adds I2C init func call to init sequence for ARM boards. This is
present in ppc,blackfin and other processor init sequence.
Signed-off-by: K R Gururaja Hebbar <gururajakr@sanyo.co.in>
The current ndfc HW ECC implementation swaps the first two ECC bytes.
But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
so this swapping in the HW ECC driver is bogus. This patch fixes this
problem and now really uses the SMC ECC byte order.
Thanks to Sean MacLennan for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
The SRD0_PFC0 register was not configured correctly to enable the GPIO's
49-63 for GPIO. They have been configured as trace signals. This patch
fixes this by clearing the corresponding bit.
Signed-off-by: Stefan Roese <sr@denx.de>
Somewhere during development of U-Boot-1.1.3 CONFIG_BOOTBINFUNC was
renamed into CONFIG_INIT_CRITICAL which was 04 Apr 2005 replaced
with CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT.
However CONFIG_SKIP_LOWLEVEL_INIT has oposite meaning to
CONFIG_BOOTBINFUNC, so fix configuration to reflect this fact.
I'm sending this patch 4th (!) time in hope it produces at least some
reaction.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Fix at91rm9200dk base and environment address.
MMC support for X_Scale PXA is broken and does not work.
Mainly, the mmc_init() function cannot recognize current SD/MMC cards.
There were already some patches around the world but none of them was
merged into the official u-boot tree.
This patch makes order fixing this issue. Resubmit after code cleanup.
Applied and tested on PXA 270 (TrizepsIV module).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix gcc4 issue. With some toolchain, a previous patch that fixes gcc4
issues generates wrong code.
(Problem was reported with gcc-4.0.2-glibc-2.3.6/arm-softfloat-linux-gnu).
This patch fixes the problem and solves the gcc-4 issues as the linux
kernel does.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Dmitry Ivanov <ivadmitry@gmail.com>
This fixes a build breakage with CONFIG_API enabled, which appeared after
the recent changes in the U-Boot build system.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* split the BAT initialization so that only 2 BATs (for the boot page
and stack) are programmed very early on. The rest are initialized later.
* Move other BAT setup, ccsrbar setup, and law setup later in the code
after translation has been enabled.
These changes will facilitate the moving of law and BAT initialization
to C code, and will aid with 36-bit physical addressing support.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The commit 04a9e1180a
cause the 83xx immap broken, so the DMA and PCI will
be failed.
The patch fix the struct spi8xxx and rm struct spi83xx.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the ATNGW100 Network Gateway reference design,
including flash, ethernet and MMC support.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Hi,
The patch adds 4 boards, called AcTux-1 .. AcTux-4. This patch contains the
files that
contain changes for multiple boards, the board-specific files follow as
separate patches.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
enables the RTS signal with CONFIG_SERIAL_RTS_ACTIVE.
No handshaking is done, but the active RTS signal allows to
connect to the target using a PC which is using RTS/CTS
handshake, and does no harm if the PC is set to ignore RTS.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
allow to load the microde from flash or ram by download it through
the serial or other.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stefan Roese <sr@denx.de>
Hi,
the following patch adds support to move the IXP42X NPE firmware to a
separate flash block, whose start address is defined in
CONFIG_IXP4XX_NPE_EXT_UCODE_BASE. Using that, it is possible to build
NPE-enabled u-boot without copyright problems due to the NPE firmware.
I hope the patch applies, I get whitespace-related differences in the NPE
files due to trailing whitespace in the original versions.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- Fix EEPROM_data structure definition according to System EEPROM Data Format.
- Read MAC addresses from EEPROM to ethXaddr before saving ethXaddr to
bd->bi_ethaddr.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board.
This board has an ST M25P40 4Mbit EEPROM on its SPI bus
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family. Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The commit 9e89647889
will cause the mpc8315erdb board can't boot up.
The patch fix that bug, and remove the duplicated #ifdef
CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for
MPC8313E processor.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[PATCH] net: add 'ethrotate' environment variable
This patch replaces the buildtime configuration option
CONFIG_NET_DO_NOT_TRY_ANOTHER through the 'ethrotate' runtime
configuration veriable. See README.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
- Moved some common code to netstal/common/nm_bsp.c.
- sdram initialisation goes go netstal/common/fixed_sdram.c.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Added some routines used by all Netstal boards:
- nm_bsp.c: - nm_show_print and
- common_misc_init_r
- set_params_for_sw_install. Very specific code to handle our SW
installation procedure
- fixed_sdram.c: Common routines for HCU4 (and upcoming) MCU25 boards
to handle sdram initialization.
- nm.h: Common header
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Moved some common code to nestal/common/nm_bsp.c.
- Added support for the vxWorks EDR.
- Enable trace for Lauterbach, if present.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Various fixes
- Reduced rom_size from 384 to 320 kB
- Environment is now in flash
- Added POST
- Support for OF
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Various fixes
- Reduced rom_size from 384 to 320 kB
- Environment is now in flash
- Added POST
- Support for OF
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
This patch fixed wrong SH7720 CPU macro and changed macro that
calculated value of SCBRR register.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Now that all boards have been converted, remove old config code and the
config option for the new style.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Reworked the initial processor initialzation sequence:
* introduced cpu_early_init_f that is run in address space 1 (AS=1)
* Moved TLB/LAW and CCSR init into cpu_early_init_f()
* Reworked initial asm code to do most of the core init before TLBs
The main reasons for these changes are to allow handling of 36-bit phys
addresses in the future and some of the issues that will exist when we
do that.
There are a few caveats on what can be initialized via the LAW and TLB
static tables:
* TLB entry 14/15 can't be initialized via the TLB table
* any LAW that covers the implicit boot window (4G-8M to 4G) must map to
the code that is currently executing.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a set of functions to manipulate TLB entries:
* set_tlb() - write a tlb entry
* invalidate_tlb() - invalidate a tlb array
* disable_tlb() - disable a variable size tlb entry
* init_tlbs() - setup initial tlbs based on static table
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE.
While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only
be used for configuring the PCI ATMU.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.
Board code is responsible to provide a law_table and num_law_entries.
We should be able to use the same code on 86xx as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With serial, NE2000, IDE support. Tested in big-endian mode.
Memory size hard-coded to 128M for now, so don't play with
the -m option.
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
rx_status on the memory is basically in LE, but needs to be handled in CPU
endian. le32_to_cpu() takes up this mission. Even if on the sane hardware,
it'll work fine.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
"to = (currticks() + RTL_TIMEOUT)" has possibilities to wrap around. If it
does, the condition "(currticks() < to)" becomes invalid and immediately
leads to tx timeout error. This patch introduces the fine-graded udely(10)
loops to ease the impact of wrapping around.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Add the support of RealTek RTL8211B PHY, the RTL8211B
PHY only supports RGMII and MII mode.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
PHY less board prints out lots of "read wrong ...":
read wrong value : mii_id 3,mii_reg 2, base e0102320
read wrong value : mii_id 3,mii_reg 3, base e0102320
UEC: PHY is Generic MII (ffffffff)
read wrong value : mii_id 3,mii_reg 4, base e0102320
read wrong value : mii_id 3,mii_reg 0, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
FSL UEC0: Full Duplex
FSL UEC0: Speed 100BT
FSL UEC0: Link is up
Using FSL UEC0 device
Make this printout depend on UEC_VERBOSE_DEBUG and
remove its definition in uec_phy.c
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
actually polling for PHY autonegotiation to finish enables us to remove the
5 second boot prompt latency present on QE based boards.
call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from
uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait
code shamelessly stolen from tsec driver.
also rm unused CONFIG_RMII_MODE code.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current TSEC driver limits MDIO access to the devices that have been configured as attached
to a TSEC MAC. This patch allows access to any PHY device on the MDIO bus through the 'mii' commands.
Signed-off-by: Michael Firth <michael.firth@bt.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
* TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
* load)
Signed-off-by: Kevin Lam <kevin.lam@freescale.com>
Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
System registers that are modified are the Arbiter Configuration
Register (ACR), the System Priority Control Register (SPCR), and the
System Clock Configuration Register (SCCR).
Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com>
Signed-off by: Joe D'Abbraccio <ljd015@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Before, the order of arguments to the pixis_reset
command needed to be supplied in a hard-coded order.
Generalize the command parsing to allow any order.
Signed-off-by: James Yang <james.yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Convert the board/freescale/common/Makefile to use
CONFIG_* options to select which files to conditionally
compile into the board/freescale/common library rather
than conditionally compiling entire files.
Now handles::
CONFIG_FSL_PIXIS
CONFIG_FSL_DIU_FB
CONFIG_PQ_MDS_PIB
CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Use driver/net/uli526x.c as MPC8610HPCD default Ethernet driver.
Remove unused ethernet CONFIG_ options.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
mpc8360emds.c: In function 'ft_board_setup':
mpc8360emds.c:327: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:329: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:334: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast
mpc8360emds.c:341: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:343: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:348: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
use tree passed to us in local blob, not global fdt.
Also use fdt_path_offset to convert to relative offset, since absolute
reference is needed to check for rgmii-id mode string value.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.
The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.
The changes are:
- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
(this may improve performance for application with many read
or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
001 (activating all the CS when only one is used may cause
unwanted noise on the system)
- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.
- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.
- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.
- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.
The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git
The last commit on this tree was 6775c68683
Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The isdram command prints out decoded information the "serial presence
detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when
debugging memory configuration problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The TSEC emergency priority definition of 831x/837x
is different than the definition of 834x in SPCR register.
Add the other config of TSEC emergency priority into
cpu_init.c
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC8360ERDK board support patch is added before
the commit 2c5b48fc20
so, miss clean up it.
The patch clean up the miss cache config.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board. Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.
This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch extends the number of supported UECs to 4. Note that the
problem of QE thread resources exhaustion is resolved by setting the
correct number of QE threads according to Ethernet type (GBE or FE).
Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SH7710/SH7712 of SH3 CPU are supported.
SH771X is called SH-Ether, and has the Ether controller in CPU.
The driver of Ether is not included in this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch add the support of map_physmem() and unmap_physmem()
used with Common Flash Interface(CFI) driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
post/cpu/ppc4xx/spr.c contained a few checks for registers only present
for PPC440 and derivates processor.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized
Signed-off-by: Dave Liu <daveliu@freescale.com>
Now that bit 29 is the USB PHY reset bit, update the Kilauea port
to remove the USB PHY reset after powerup. The CPLD will keep the
USB PHY in reset (active low) until the bit is set to 1 in
board_early_init_f().
Signed-off-by: Stefan Roese <sr@denx.de>
- get rid of "version" target whichdidn't really work
- make autoconf.mk depend on version_autogenerated.h to make sure
to rebuild files as needed
- add XECHO macro to allow for silent build using "make -s"
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently, when CONFIG_CMDLINE_EDITING is set, bootretry doesn't work.
This patch fixes the problem.
Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
Many of the SPD bytes for DDR2 SDRAM are not interpreted correctly by the
"i2c sdram" command. This patch provides correct alternative
interpretations when DDR2 memory is detected.
Signed-off-by: Larry Johnson <lrj@acm.org>
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.
The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.
Signed-off-by: Wolfgang Denk <wd@denx.de>
There were some size and unsigned problems.
Also add support for "ll" size modifier in format string like glibc
Signed-off-by: James Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
The TK885D board uses a TQM885D module from TQ, this port adds an
own configuration file and adds a last_stage_init() method to
configure the two PHYs, depending on the phy_auto_nego environment
variable.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Lines of the lenght CONSOLE_COLS or greater than CONSOLE_COLS
are not displayed correctly. This is an attempt to fix
this issue. Also add carriage return handling.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
Clear possible errors in MCSR resulting from data-eye-search.
If not done, then we could get an interrupt later on when
exceptions are enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
According to the latest user manual of MPC8315E,
1) The SVCOD of HRCWL is different than 837x
2) The SCCR has changes
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
connected to SPI.
Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
the new libfdt code only updates eth0 if CONFIG_HAS_ETH0
is defined; add the define to the missing board configs.
Thanks to Emilian Medve for finding this.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Configure the number of bits used to address the banks inside the SDRAM
device. The default register value of 0 means 2 bits to address 4 banks.
Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks.
Signed-off-by: Becky Bruce <bgill@freescale.com>
vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash
After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Change return values of init() functions in all Ethernet drivers to conform
to the following:
>=0: Success
<0: Failure
All drivers going forward should return 0 on success. Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-By: Timur Tabi <timur@freescale.com>
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it. Add function qe_upload_firmware() to parse the blob and
perform the actual upload. Add command-line command "qe fw" to take a firmware
blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware. Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Signed-off-by: Timur Tabi <timur@freescale.com>
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset
UCCs.
p.s Similar code exists in the Linux kernel board file (for capability
reasons with older U-Boots), but should be removed some day.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.
Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Grab the FSL Book-E MAS register macros from Linux. Also added
defines for page sizes up to 4TB and removed SHAREN since it doesnt
really exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Way back in August I merged Heiko's patch:
566a494f59: [PCS440EP] upgrade the PCS440EP board
with Jon's CONFIG_COMMANDS patches.
This was done in commit: 6bf6f114dc
However, in the process, I left out some of Heiko's good changes.
Now Heiko's and Jon's patches are properly merged in fat_register_device()
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add new function readline_into_buffer() that allows the
output of readline to be put into a pointer to char buffer.
This refactoring allows other functions besides the
main command loop to also use the same input mechanism.
Signed-off-by: James Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Ctrl combo key support is added, which is very useful to input Ctrl-C
for interrupt current job.
Also add usb_event_poll() calling to usb_kbd_testc(), which can get
key input when tstc() is called.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
We now have more useful version of do_mii() and everybody use it.
Gerald Van Baren says:
> When I originally wrote the mii command 6(!) years ago, I wrote a
> verbose version that printed human readable decomposition of the flags,
> etc., and a terse one that didn't print as much stuff and thus had a
> smaller memory footprint.
>
> It sounds like the terse version has withered and died, apparently
> people are only using the verbose version (which is very understandable,
> I do myself).
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
If type mii command without arguments, we suffer from uninitialized argv[]
entries; for example we MIPS get stuck by TLB error.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
This is an API for external (standalone) applications running on top of
U-Boot, and is meant to be more extensible and robust than the existing
jumptable mechanism. It is similar to UNIX syscall approach. See api/README
for more details.
Included is the demo application using this new framework (api_examples).
Please note this is still an experimental feature, and is turned off by
default.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Assumes the presence of the aliases node in the DTS to
locate the pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
didnt realize how out of shape easylogo actually was until i tried using it.
this patch does byte swapping as need be on the input tga header since the tga
is in little endian but the host could just as well be big endian. i didnt
bother using bswap macros or such stuff from system headers as nothing in
POSIX dictates byte swapping functionality.
Signed-Off-By: Mike Frysinger <vapier@gentoo.org>
- make the Makefile not suck
- include proper headers for prototypes
- fix obvious broken handling of strchr() when handling '.' in filenames
Signed-Off-By: Mike Frysinger <vapier@gentoo.org>
This patch allows u-boot to build without error in a cygwin
environment. Cygwin does not define __u64 in it's
include/asm/types.h file. The -idirafter flag in the u-boot
build causes the inclusion of the cygwin types.h file as opposed
to u-bot/include/asm/types.h file which does define __u64.
Subsequently, sha1.c compile fails due to unknown symbol.
Signed-off-by: Brian Miller <raptorbrino@netscape.net>
The existing code can show information about a gzip compressed BMP
image, but can't actually display it.
Therefore, move the decompression code out of bmp_info() and use it in
bmp_display() as well in order to display a compressed BMP image.
Also, clean things up a bit and fix a memory leak while we're at it.
[hskinnemoen@atmel.com: a bit of refactoring]
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch fixes several issues at least on a MPC885 based system with two
FEC interfaces used in MII mode.
1. PHY discovery should first read PHY_PHYIDR2 register and only then
PHY_PHYIDR1 like cpu/mpc8xx/fec.c::mii_discover_phy() does it,
otherwise the values read are wrong. Also notice, that PHY discovery
cannot work on MPC88x / MPC87x in setups with both FECs active at all
in its present form, because for both interfaces the registers from FEC
1 are used to communicate over MII.
2. Remove code duplication for resetting the FEC by isolating it into a
separate function.
3. Initialize MII on FEC 1 when communicating over FEC 2 in fec_init().
4. Optimize mii_init() to only reset the FEC 1 controller once.
5. Fix a typo in mii_init() using index i instead of j thus potentially
leading to unpredictable results.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
It is unclear on what platforms this driver has been tested, since
noone up to now defines CONFIG_RTL8169 in the board configuration
header. Now it has been fixed for a big-endian mpc8241 based
linkstation platform. This patch presents the necessary endianness
conversion fixes.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Ctrl combo key support is added, which is very useful to input Ctrl-C
for interrupt current job.
Also add usb_event_poll() calling to usb_kbd_testc(), which can get
key input when tstc() is called.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch removes the unnecessary bit swapping when
booting .bit files with the 'fpga loadb' command.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds a post configuration callback for Spartan2/3 FPGAs.
pre and post configuration callback are now optional and
not called when the function pointer is set to NULL.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.
See README for the new options:
CONFIG_FPGA,
CONFIG_FPGA_<vendor>,
CONFIG_FPGA_<family>
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
With this patch it is possible to reimplement default_serial_console()
in board specific code. This will be done in the upcomming PMC440
U-Boot port. This also allows the lwmon board maintainer to
remove the '#if !defined(CONFIG_LWMON) ...' from common/serial.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds a 'cu' like serial terminal command to u-boot
using which you can access other serial ports from the system console.
OpenMoko uses this in their Neo1973 phones to get access to the GSM
Modem and GPS chip from the bootloader.
Signed-off-by: Harald Welte <laforge@openmoko.org>
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses
self modifying code and this doesn't work with stack in d-cache, since
I can't move the code from d-cache to i-cache. We move the SPR test to
be executed a little later, after relocation. Then stack is located in
SDRAM and this self-modifying code is no problem anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch configures the LWMON5 port to use d-cache as init-ram and
the unused GPT0_COMP6 as POST WORD storage.
Signed-off-by: Stefan Roese <sr@denx.de>
The privious 4xx POST implementation only supported storing the POST
WORD in OCM. Since we need to reserve the OCM on LWMON5 for the logbuffer
we need to store the POST WORD in some other non volatile location.
This patch adds CFG_POST_ALT_WORD_ADDR to specify an address for such
a location.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for locking the init-ram/stack in d-cache,
so that other regions may use d-cache as well
Note, that this current implementation locks exactly 4k of d-cache,
so please make sure that you don't define a bigger init-ram area. Take
a look at the lwmon5 440EPx implementation as a reference.
Signed-off-by: Stefan Roese <sr@denx.de>
ext2fs_read_file() had the function arguments swapped.
Pointed out by Mike Montour, 19 Dec 2007 22:34:25 -0800
Signed-off-by: Wolfgang Denk <wd@denx.de>
The MPC5200 OHCI controller operates in big endian, so
CFG_OHCI_BE_CONTROLLER must be defined for it to work properly.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch updates the fw_printenv/fw_setenv userspace tool to include
the correct MTD header in order to compile against current kernel
headers. Backward compatibility is preserved by introducing an option
MTD_VERSION which can be set to "old" for compilation using the old MTD
headers. Along with this a number of warnings are fixed.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch allows the use of 4xx interrupt vector number defines
in board specific code outside cpu/ppc4xx.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch updates the PLB/PCI divider when running at
400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Add CFG_NAND_QUIET_TEST option to disable error message when
no NAND chip is installed on PMC440 boards.
Disable a couple of config defines that are only used for NAND_U_BOOT.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch updates the fw_printenv/fw_setenv userspace tool to include
the correct MTD header in order to compile against current kernel
headers. Backward compatibility is preserved by introducing an option
MTD_VERSION which can be set to "old" for compilation using the old MTD
headers. Along with this a number of warnings are fixed.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This is partial patch from the DTC/libfdt
commit 67b6b33b9b413a450a72135b5dc59c0a1e33e647
Author: David Gibson <david@gibson.dropbear.id.au>
Date: Wed Nov 21 11:56:14 2007 +1100
The patch also fixes one genuine bug caught by valgrind -
_packblocks() in fdt_rw.c was using memcpy() where it should have been
using memmove().
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This patch adds more documenting comments to libfdt.h. Specifically,
these document the read/write functions (not including fdt_open_into()
and fdt_pack(), for now).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds some more documenting comments to libfdt.h.
Specifically this documents all the write-in-place functions.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Implement a suggestion by Scott Wood to make the /chosen handling fine
grained. Don't overwrite pre-existing properties on a per-property basis,
so if /chosen exists but a necessary /chosen/property doesn't, it gets
created. If a /chosen property exists, it is NOT overwritten unless the
"force" flag is true.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Add a note that "fdt copy" makes the new address active.
Remove most of the extra hints at the end of the fdt help.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Fix a bug found and documented by Bartlomiej Sieka where the optional
value on "fdt set <path> <prop> [<val>]" wasn't optional.
=> fdt mknode / testnode
=> fdt print /testnode
testnode {
};
=> fdt set /testnode testprop
=> fdt print /testnode
testnode {
testprop;
};
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
fdt_find_and_setprop() is used by several 4xx boards and it's
missing in the appropriate header. This patch eliminates a
warning when building U-Boot for such boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Acked-by: Stefan Roese <sr@denx.de>
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Make libfdt the default for the WRS SBC8349 board.
Parallel of commit 35cc4e4823
done for the other 83xx based boards. Also fix a typo in CONFIG_PCI.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
This adds libfdt support code for the Wind River sbc8349 board.
Parallel of commit 3fde9e8b22 for
the other Freescale 83xx boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
ECC code is now shared for all 83xx boards, so remove board specific one.
See commit daab8c67d2 for reference.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The MPC8360E MDS config defined:
CONFIG_OF_HAS_BD_T
CONFIG_OF_HAS_UBOOT_ENV
Which we don't use or ever needed. This seems like copy-paste feature creep.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for 837x.
This change guarantees that the environment will be located on the
first flash sector after the U-Boot image.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards. This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Now that there are no board-specific versions of
"denali_core_search_data_eye()", the weak binding on the common version
can be removed.
Signed-off-by: Larry Johnson <lrj@acm.org>
On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch makes two additions to GPIO support:
First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).
Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".
According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output. The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers. The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output. For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).
Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option. This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1". The first option is used when the "out_val" element is
set to "GPIO_OUT_0". Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
When CONFIG_NET_DO_NOT_TRY_ANOTHER is defined U-Boot's
networking stack does not automatically switch to
another interface. This patch does not touch the default
behavior.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch modifies the return code handling in the eth_init()
function, to be compatible with the handling of the return codes in
the other network stack files. It now returns a 0 on Success and -1 on
error.
Signed-off-by: Upakul Barkakaty <upakul.barkakaty@conexant.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Assigning the output of simple_strtoul(CB:A9:87:65:43:21) to `char', we are
warned as below:
U-Boot 1.2.0 (Aug 30 2007 - 08:27:37)
DRAM: 256 MB
Flash: 32 MB
In: serial
Out: serial
Err: serial
Net: NEC-Candy
Warning: NEC-Candy MAC addresses don't match:
Address in SROM is 00:00:4C:80:92:A2
Address in environment is FFFFFFCB:FFFFFFA9:FFFFFF87:65:43:21
This patch changes env_enetaddr type from `char' to `unsigned char'.
Cc: Masaki Ishikawa <ishikawa-masaki@cnt.mxe.nes.nec.co.jp>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The purpose of this routine is receiving a single network frame, outside of
U-Boot's NetLoop(). Exporting it to standalone programs that run on top of
U-Boot will let them utilise networking facilities. For sending a raw frame
the already existing eth_send() can be used.
The direct consumer of this routine is the newly introduced API layer for
external applications (enabled with CONFIG_API).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: Stefan Roese <sr@denx.de>
The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:
$ /usr/bin/test a == a && echo OK
/usr/bin/test: ==: binary operator expected
This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch brings the PMC440 board configuration file.
Finally it enables the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
In an attmemt to clean up the 4xx start.S file, I removed the enabling
of the internal 405EP PCI arbiter. This is needed for multiple other
405EP platforms, like most of the esd 405EP. Now the internal PCI
arbiter is enabled again per default as it has been before.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This board never left prototyping state and it
became a millstone round my neck. So remove it.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
These patches add support for the PPC440EPx-based "Korat" board to
U-Boot. They are based primarily on support for the Sequoia board.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds SPD DDR2 support for the 440EPx ("Denali") SDRAM
controller. It should also work on the 440GRx. It is based on the DDR2
SPD code for the 440EP/440EPx, but makes no provision for DDR1 support.
This code has been tested on prototype Korat boards with three Kingston
DIMMS: 512 MiB ECC (one rank), 512 MiB non-ECC (one rank) and 1 GiB ECC
(two ranks). The Korat board has a single DIMM socket, but support has
been provided (though not tested) for boards with two DIMM sockets.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch creates a non-board-specific file for performing the SDRAM
data-eye search. It also adds ECC error checking to the test of valid
data on readback when ECC is enabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds the Denali SDRAM controller definitions to "ppc440.h".
It also fixes two typos in the definitions, so the board-specific
"sdram.h" files containing these definitions are also fixed to avoid
compiler warnings.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds a new switch: "CONFIG_PHY_DYNAMIC_ANEG". When this symbol
is defined, the PHY will advertise it's capabilities for autonegotiation
based on the capabilities shown in the PHY's status registers, including
1000BASE-X. When "CONFIG_PHY_DYNAMIC_ANEG" is not defined, the PHY will
advertise hard-coded capabilities, as before.
Signed-off-by: Larry Johnson <lrj@acm.org>
This driver is based on the driver for the M41T11. In the intended
application, the RTC will be powered by a large capacitor, rather than a
battery. The driver therefore checks to see whether the RTC has lost
power. The chip's OUT bit is normally reset from its power-up state. If
the OUT bit is read as set, or if the date and time are not valid, then the
RTC is assumed to have lost power, and its date and time are reset to
1900-01-01 00:00:00.
Support for adjusting the speed of the clock to improve accuracy is
provided through an environment variable.
Signed-off-by: Larry Johnson <lrj@acm.org>
On Sequoia & LWMON5 the virtual address of the POST cache test is now
moved to a bigger address. This enables usage of more memory on those
boards.
Signed-off-by: Stefan Roese <sr@denx.de>
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the cpu node setup ("timebase-frequency" and "clock-frequency") is
without using the absolute path to the cpu node. This makes it possible
to use this U-Boot version with both versions of cpu-node naming
"cpu@0" and the former "PowerPC,440EPx@0".
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx clear_bss() fails if BSS segment size is not
divisible by 4 without remainder. This patch provides
fix for this problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
When using dhcp/bootp the "netmask" environment variable is not
set because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
desireable, so the following patch adds this this option to the board
config.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch allows the ECC POST to be used for different boards with the
PPC440 Denali SDRAM controller. Modifications include skipping the test
if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization
to prevent timing errors.
Signed-off-by: Larry Johnson <lrj@acm.org>
flush + invalidate_dcache_range() expect the start and stop+1 address.
So the stop address is the first address behind (!) the range.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
By using aliases in the dts file, the ethernet node fixup is
much easier with the recently added functions.
Please note that the dts file needs the aliases for this to work.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch update the 4xx fdt support. It enabled fdt booting
on the AMCC Kilauea and Sequoia for now. More can follow later
quite easily.
Signed-off-by: Stefan Roese <sr@denx.de>
The check for an sufficiently erased destination was missing in the
buffered write function of the cfi flash driver (when
CFG_FLASH_USE_BUFFER_WRITE is defined). This patch adds this check to that
writing to such a region will fail with the currect error message.
Signed-off-by: Stefan Roese <sr@denx.de>
CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
On the TQM885D the measurement of cpuclk with the PIT reference
timer ist not necessary. Since all module variants use the same
external 10 MHz oscillator, the cpuclk only depends on the PLL
configuration - which is readable by software.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 128. This result
in a refresh rate of 4 * 7.8 us at the default clock
66 MHz. At 133 MHz the value will be then 4 * 3.8 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Run fixups based on the JEDEC manufacturer ID independent of the
command set ID.
This changes current behaviour: Previously, geometry reversal for AMD
chips were done based on the command set ID, while they are now done
based on the JEDEC manufacturer and device ID.
Also add fixup for top-boot Atmel chips. A fixup is needed for
AT49BV6416(T) too, but since u-boot currently only reads the low byte
of the device ID, there's no way to tell it apart from AT49BV642D,
which should not have this fixup. Since AT49BV642D support is
necessary to get ATNGW100 board support into mainline, I've commented
out the fixup for now.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Move things like reading JEDEC IDs and fixing up geometry reversal
into separate functions. The geometry reversal fixup is now performed
by altering the qry structure directly, which makes the sector init
code slightly cleaner.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Read out the whole CFI Standard Query structure after successful cfi
identification. This allows subsequent code to access this information
directly without having to go through flash_read_uchar() and friends.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
disable_interrupts() should return nonzero if interrupts were
_enabled_ before, not disabled.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The timer code depends on the timer interrupt to keep track of the
upper 32 bits of the cycle counter. This obviously doesn't work when
interrupts are disabled the whole time.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
As reported by Gerhard Berghofer:
in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.
which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add all the ATSTK1000 daughterboards to MAINTAINERS along with their
"mother". Also update the entry for ATSTK1000 to be not only about the
AP7000 CPU; it's intended to handle all CPUs in the AT32AP family.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1004 is a daughterboard for ATSTK1000 with the AT32AP7002 CPU,
which is a derivative of AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1003 is a daughterboard for ATSTK1000 with the AT32AP7001 CPU,
which is a derivative of AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add a chip-features file providing definitions of the form
AT32AP700x_CHIP_HAS_<peripheral>
to indicate the availability of the given peripheral on the currently
selected chip.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch update the 4xx fdt support. It enabled fdt booting
on the AMCC Kilauea and Sequoia for now. More can follow later
quite easily.
Signed-off-by: Stefan Roese <sr@denx.de>
Use map_physmem() and unmap_physmem() to convert from physical to
virtual addresses. This gives the arch a chance to provide an uncached
mapping for flash accesses.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.
This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Introduce flash_read{8,16,32,64) and flash_write{8,16,32,64} and use
them to access the flash memory. This makes it clearer when the flash
is actually being accessed; merely dereferencing a volatile pointer
looks just like any other kind of access.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Reorder the functions in cfi_flash.c so that each function only uses
functions that have been defined before it. This allows the static
prototype declarations near the top to be eliminated and might allow
gcc to do a better job inlining functions.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch tries to keep all lines in the cfi_flash driver below 80
columns. There are a few lines left which don't fit this requirement
because I couldn't find any trivial way to break them (i.e. it would
take some restructuring, which I intend to do in a later patch.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.
Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE targets.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8568 MDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8540 ADS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8560 ADS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
instead of getting it via &immap->im_cpm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Removed HAS_ETH2/HAS_ETH3 - MPC8544 only has TSEC1/2
* Removed some misc environment setup
* Moved to using fdtfile & fdtaddr as fdt env var names
* Enabled CONFIG_CMDLINE_EDITING
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8544DS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch selects the USB data pins in the 405EX GPIO and MFC (multi
function control) registers. This is done for the AMCC Kilauea and
Makalu eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
The following patch adds support for non-CFI flash ROMS, by hooking into the
CFI flash code and using most of its code, as recently discussed here in the
thread "Mixing CFI and non-CFI flashs".
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Stefan Roese <sr@denx.de>
We use a combination of the serialN alias and CONFIG_CONS_INDEX to
determine which serial alias we should set linux,stdout-path to.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The composition of the directory in the drivers/ changed.
I moved SuperH serial driver and marubun PCMCIA driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by
setting the FIXD bit in the SDR0_MFR register. Here a description of the
symptoms:
Problem Description
------------------------------
If a DMA is performed between memory and PCI with the DMA 1 Controller
using prefetch, and as a result uses a special purpose buffer selected by
the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29),
the first part of the transfer sequence is performed twice. The
PPC440SPe PCI Controller requests more data than was needed such that in
the case of enforce memory protection, a host CPU exception can occur.
No data is corrupted, because data transfer is stopped in the PCI
Controller. Prefetch enable is specified by setting DMA Configuration
Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0.
Behavior that may be observed in a running system
---------------------------------------------------------------------------
1. DMA performance is decreased because of the double access on the PCI bus
interface.
2. If an illegal access to some address on the PCI bus is detected at the
system level, a machine check or similar system error may occur.
Workarounds Available
----------------------------------
1. Do not program prefetch. Note that a prefetch command cannot be programmed
without selecting a special purpose buffer.
2. To avoid crossing a physical boundary of the PCI slave device, add 512
bytes of address to the PCI address range.
This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com>
from AMCC and slighly changed.
Signed-off-by: Pravin M. Bathija <pbathija@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This manual PCIe reset triggering solves the problem seen with the
Intel EPRO/1000 card, which was not detected (link not established)
upon power-up reset.
Signed-off-by: Stefan Roese <sr@denx.de>
Marubun pcmcia is a chip for PCMCIA used with SuperH.
Of course, this can be used even by other architectures.
When use this driver, came to be able to use CompactFlash
and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
After an error in the AMCC 405EX users manual now correctly configure
IRQ2 (Kilauea)/IRQ0 (Makalu) as alternate 2 signal for external IRQ
usage.
Signed-off-by: Stefan Roese <sr@denx.de>
Added the following fdt fixup helpers:
* do_fixup_by_prop{_u32} - Find matching nodes by property name/value
* do_fixup_by_compat{_u32} - Find matching nodes by compat
The _u32 variants work the same only the property they are setting
is know to be a 32-bit integer instead of a byte buffer.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cmd_fdt.c: In function fdt_print:
cmd_fdt.c:586: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:613: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:635: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:636: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Update libfdt to commit 8eaf5e358366017aa2e846c5038d1aa19958314e from
the device tree compiler (dtc) project.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the generic fixup handling code out of cpu/mpc5xxx and cpu/mpc8260
into common/fdt_support.c and renamed:
do_fixup() -> do_fixup_by_path()
do_fixup_u32() -> do_fixup_by_path_u32()
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Removed:
fdt_node_is_compatible
fdt_find_node_by_type
fdt_find_compatible_node
To ease merge of newer libfdt as we aren't using them anywhere at this time.
Also moved fdt_find_and_setprop out of libfdt into fdt_support.c for the same
reason.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix library problems caused by conditional compilation. Using
autoconf.mk to decide which files to compile has caused a problem when
changing configuration from one board to another without clearing out
the library (*.a) files.
It used to be that the linker was always passed the same list of .o
files when building the .a files. However, that is not longer true
with conditional compilation. Now, a different board config will have
a different file list passed to the linker. The problem occurs when
a library has already been built and the board config is changed.
Since the linker will update instead of replace a preexisting library,
then if the file list changes to remove some object files the old
objects will still exist in the library.
The solution is to remove all old library files when autoconf.mk is
made.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Use cpp and sed to postprocess config.h and import the defined values
into include/autoconf.mk. autoconf.mk is then included by config.mk to
give 'make' access to the board configuration.
Doing this enables conditional compilation at the Makefile level instead
of by wrapping every .c file with #ifdef/#endif wrappers.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
These two structures are still needed during the
initialization and setup of the DIU hardware.
So move them to the fsl_diu_fb.h file for now.
Official "blah".
Noticed-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
lowlevel_init.S: Assembler messages:
lowlevel_init.S:413: Warning: Pretending global symbol used as branch target is local.
Looking at codes, the `memtest' and `clearmem' are intentional mixed
use of `global symbols' and `label' for debugging purpose. To make it
build, just disable global-symbols-use for now. As a result `memtest'
still remains as unused, but leave it be...
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
gth2.c: In function 'misc_init_r':
gth2.c:434: warning: pointer targets in passing argument 2 of 'setenv' differ in signedness
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
gth2.c: In function 'misc_init_r':
gth2.c:434: warning: pointer targets in passing argument 2 of 'setenv' differ in signedness
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:139: warning: 'return' with no value, in function returning non-void
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_enet_initialize':
au1x00_eth.c:246: error: 'au1x00_miiphy_read' undeclared (first use in this function)
au1x00_eth.c:246: error: (Each undeclared identifier is reported only once
au1x00_eth.c:246: error: for each function it appears in.)
au1x00_eth.c:246: error: 'au1x00_miiphy_write' undeclared (first use in this function)
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:298: warning: 'return' with no value, in function returning non-void
make[1]: *** [au1x00_eth.o] Error 1
Fixed by moving these two functions forward.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Ugh. I *hate* to back this change out, but these compiler flags don't
work for relocation on all versions of GCC. I've not been able to
reproduce the environment in my setup (and hence, not been able to
find a combination that *does* work), so I've got no choice but to go
back to the old gcc flags and linker script.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch has been sent on:
- 29 Sep 2007
Although mips_io_port_base is currently a part of IDE command, it is quite
fundamental for MIPS I/O port access such as in[bwl] and out[bwl]. So move
it to MIPS general part, and introduce `set_io_port_base()' from Linux.
This patch is triggered by multiple definition of `mips_io_port_base' build
error on gth2 (and tb0229 also needs this fix.)
board/gth2/libgth2.a(gth2.o): In function `log_serial_char':
/home/skuribay/devel/u-boot.git/board/gth2/gth2.c:47: multiple definition of `mips_io_port_base'
common/libcommon.a(cmd_ide.o):/home/skuribay/devel/u-boot.git/common/cmd_ide.c:712: first defined here
make: *** [u-boot] Error 1
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Spartan2/3 FPGAs. The old code used "< 0" on a "char" type to test if
the most significant bit was set, which did not work on any
architecture where "char" defaulted to be an unsigned type.
Based on a patch by Angelos Manousaridis <amanous@inaccessnetworks.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds changes needed for Makalu rev 1.1:
- Enable 2nd DDR2 bank resulting in 256MByte of SDRAM
- Enable 2nd ethernet port EMAC1
- Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE)
- Reset PCIe ports via GPIO upon bootup
Signed-off-by: Stefan Roese <sr@denx.de>
This change is in preparation for condtitionial compile support in the
build system. By spliting them all into seperate lines now, subsequent
patches that change 'COBJS-y += ' into 'COBJS-$(CONFIG_<blah>) += ' will
be less invasive and easier to review
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for three new DDR chips that may be present on a NG
INKA4x0 hardware: HYB25D512160BF-5, K4H511638C-7CB3, T46V32M16BN-6IT.
Cleanup board/inka4x0/mt48lc16m16a2-75.h file.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch makes the sequoia board use the generic usb-ohci driver
instead of cpu/ppc4xx/usb_ohci.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch disables the 44x d-cache on 'usb start' and
reenables it on 'usb stop'. This should be seen as a
temporary fix until the generic usb-ohci driver can
life with d-cache enabled.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some redundant code and decrements the end
address of cache flush and invalidate by 1.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Most 4xx PPC capable of using an I2C bootrom for bootstrap setting
already print a line with the information which I2C bootrom is
used for bootstrap configuration. So we don't need this extra line
with "I2C boot EEPROM en-/dis-abled".
This patch also has a little code cleanup integrated.
Signed-off-by: Stefan Roese <sr@denx.de>
Add cfb console support to FSL 8610 DIU driver.
Inspect board version from PIXIS to obtain correct pixel format.
Use #define CONFIG_VIDEO in config file to enable fb console.
To switch monitor, set monitor variable to
0 - DVI, 1 - Single link LVDS, 2 - Double link LVDS
followed by "diufb init".
Preserve logo bitmap at the top of the fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
1280x1024 and 1024x768 @ 32 bpp are supported now.
DVI, Single-link LVDS, Double-link LVDS are all supported.
Environmental variable "monitor" is used to specify monitor port.
A new command "diufb" is introduced to reinitialize monitor
and display a BMP file in the memory. So far, 1-bit, 4-bit,
8-bit and 24-bit BMP formats are supported.
diufb init
- initialize the diu driver
Enable the port specified in the environmental variable "monitor"
diufb addr
- display bmp file in memory.
The bmp image should be no bigger than the resolution, 1280x1024
for DVI and double-link LVDS, 1024x768 for single-link LVDS.
Note, this driver allocate memory but doesn't free it after use
It is written on purpose -- to avoid a failure of reallocation
due to memory fragement.
ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon loeliger <jdl@freescale.com>
This Freescale logo is a 340 x 128 x 4bpp BMP file
that can be displayed by the DIU Framebuffer driver.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The address in the BAT register is aligned with the BAT size.
The original definition actually did not define BAT for PCIE2 IO.
This patch fix this.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch implements general ULi 526x Ethernet driver.
Until now, it is the only native Ethernet port on
MPC8610HPCD board, but it could be used on other boards
with ULi 526x Ethernet port as well.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
This patch adds support for 1000BASE-X to functions "miiphy_speed ()" and
"miiphy_duplex()". It also adds function "miiphy_is_1000base_x ()", which
returns non-zero iff the PHY registers are configured for 1000BASE-X. The
"mii info" command is modified to distinguish between 1000BASE-T and -X.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
The scan code of the key 'z' is 0x1d, which should be handled.
The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI
controller.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
The configuration file has already enabled USB, but it
missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB
on MPC8641HPCN can not work because of the wrong USB
register endian.
And add the USB command to U-Boot commands list.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
usb_cpu_init() configures GPS USB pins, clocks, etc. and
is required for proper operation of kernel USB subsystem.
This setup was previously done in the kernel by the fixup
code which is being removed, thus low level init must be
done by U-boot now.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Since December 2003 the timer_interrupt_cpu() function in
cpu/mpc824x/interrupts.c contains what seems to be a superfluous
parameter. Remove it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
To get the IDS8247 board working following are done:
- FCC2 is deactivated
- FCC1 is activated
- I2C is activated
- CFI driver is activated
- Adapted for use with LIBFDT
Signed-off-by: Sergej Stepanov <Sergej.Stepanov@ids.de>
--
This patch adds NAND booting support for the AMCC 405EX(r) eval boards.
Again, only one image supports both targets.
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang is right: It's not a good idea to set up default initial
ethernet addresses for a board, even though they belong to the local
range.
This will change the failure mode from "IT manager screams at you for
using duplicate ethernet addresses" to a nice error message explaining
that the ethernet address hasn't been set properly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This is a multi-part message in MIME format.
commit e6e505eae94ed721e123e177489291fc4544b7b8
Author: Justin Flammia <jflammia@savantav.com>
Date: Mon Oct 29 17:19:03 2007 -0400
Found a bug in the way the DHCP Request packet is built, where the IP address
that is offered by the server is bound to prematurely. This patch is a fix of
that bug where the IP address offered by the DHCP server is not used until
after the DHCP ACK from the server is received.
Signed-off-by: Justin Flammia <jflammia@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Since the cache handling functions were moved from start.S into cache.S
the acadia NAND booting Makfile needs to be adapted accordingly.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the CONFIG_4xx_DCACHE options to some SDRAM init files
and to the Sequoia TLB init code. Now the cache can be enabled on 44x
boards by defining CONFIG_4xx_DCACHE in the board config file. This
option will disappear, when more boards use is successfully and no
more known problems exist.
This is tested successfully on Sequoia and Katmai. The only problem that
needs to be fixed is, that USB is not working on Sequoia right now, since
it will need some cache handling code too, similar to the 4xx EMAC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.
Signed-off-by: Stefan Roese <sr@denx.de>
I lately noticed, that newer 4xx board with GBit support sometimes don't
finish link autonegotiation in 4 seconds. Changing this timeout to 5
seconds seems fine here.
Signed-off-by: Stefan Roese <sr@denx.de>
The POST ethernet test needed to be changed to dynamically determine
the count of ethernet devices. This code is cloned from the 4xx
ethernet driver.
Signed-off-by: Stefan Roese <sr@denx.de>
We now use a value in the gd (global data) structure for the UART input
frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely
in get_sys_info().
Signed-off-by: Stefan Roese <sr@denx.de>
The Haleakala is nearly identical with the Kilauea eval board. The only
difference is that the 405EXr only supports one EMAC and one PCIe
interface. This patch adds support for the Haleakala board by using
the identical image for Kilauea and Haleakala. The distinction is done
by comparing the PVR.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch also adds a note to the fixed DDR setup for Bamboo NAND booting:
Note:
As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
modules are still plugged in. So it is recommended to remove the DIMM
modules while using the NAND booting code with the fixed SDRAM setup!
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Change 4xx_uart.c:
- Use in_8/out_8 macros instead of in8/out8
- No need for UART_BASE marco anymore, now really handled via function
parameter
- serial_init_common() introduced
- Further coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Change all linker scripts to reference the changed driver name 4xx_uart.o.
Note: In most cased all these explicit referencing of these object files
in the linker scripts is not neccessary. Only for manually embedded
environment into the U-Boot image, which is not done is most cases.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch starts the rework of the PPC4xx serial driver. First we split
the file into two seperate files, one 4xx_uart.c with the 405/440 UART
handling code and the other one iop480_uart.c with the UART code for the
PLX-Tech IOP480 PPC (PPC403 based).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the Xicor/Intersil X1205 RTC used on the
AMCC Makalu eval board. This driver is basically cloned from the Linux
driver version (2.6.23).
This patch also introduces the Linux bcd.h header for the BCD2BIN/
BIN2BCD conversions. In the future some of the other U-Boot RTC driver
should be converted to also use this header instead of implementing
their own local copy of these functions/macros.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some common 4xx macros and the PPC405_SYS_INFO/
PPC440_SYS_INFO structure into the common ppc4xx.h header.
Lot's of other macros are good candidates to be consolidated this way
in the future.
Signed-off-by: Stefan Roese <sr@denx.de>
The size was initilized wrong. Instead of 256MB, the DDR2 controller
was setup to 512MB. Now the correct values is used.
This patch also does a little cleanup and adds a comment here.
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_BOOKE must be defined for PPC440 processors so that the proper SPR
number is used to access system registers.
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On Yucca & Katmai, the inbound memory map pointed to 0x4.0000.0000, which
is the internal SRAM. Since I now ported and tested this endpoint mode
on Kilauea successfully to map to 0 (SDRAM), I also changed this for
Katmai.
Yucca will stay at internal SRAM for now. Not sure if somebody relies on
this setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds endpoint support for the AMCC Kilauea eval board. It can
be tested by connecting a reworked PCIe cable (only 1x lane singles
connected) to another root-complex.
In this test setup, a 64MB inbound window is configured at BAR0 which maps
to 0 on the PLB side. So accessing this BAR0 from the root-complex will
access the first 64MB of the SDRAM on the PPC side.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.
This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:
pcie_mode=RP:EP:EP
This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.
Per default Yucca will be configured as:
pcie_mode=RP:EP:EP
Per default Katmai will be configured as:
pcie_mode=RP:RP:REP
Per default Kilauea will be configured as:
pcie_mode=RP:RP
Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the fdt support on the AMCC Kilauea eval board.
Additionally now EBC ranges fdt fixup is included to support NOR
FLASH mapping via the Linux physmap_of driver.
This Kilauea port now support booting arch/ppc and arch/powerpc
Linux kernels. The default environment "net_nfs" is for arch/ppc
and "net_nfs_fdt" is for arch/powerpc. In the long run, arch/ppc
support will be removed.
Signed-off-by: Stefan Roese <sr@denx.de>
128MB seems to be the smallest possible value for the memory size
for on PCIe port. With this change now the BAR's of the PCIe cards
are accessible under U-Boot.
One big note: This only works for PCIe port 0 & 1. For port 2 this
currently doesn't work, since the base address is now 0xc0000000
(0xb0000000 + 2 * 0x08000000), and this is already occupied by
CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean
to change the base addresses completely and this change would have
too much impact right now.
This patch adds debug output to the 4xx pcie driver too.
Signed-off-by: Stefan Roese <sr@denx.de>
These files were introduced with the IBM 405GP but are currently used on all
4xx PPC platforms. So the name doesn't match the content anymore. This patch
renames the files to 4xx_pci.c/h.
Signed-off-by: Stefan Roese <sr@denx.de>
(3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access
the SDR registers of the PCIe ports. This makes the overall design
clearer, since it removed a lot of switch statements which are not
needed anymore.
Also, the functions ppc4xx_init_pcie_rootport() and
ppc4xx_init_pcie_entport() are merged into a single function
ppc4xx_init_pcie_port(), since most of the code was duplicated.
This makes maintainance and porting to other 4xx platforms
easier.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(2) This patch renames the functions from 440spe_ to 4xx_ with a
little additional cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(1) This patch renames the files from 440spe_pcie to 4xx_pcie
Signed-off-by: Stefan Roese <sr@denx.de>
usb_cpu_init() configures GPS USB pins, clocks, etc. and
is required for proper operation of kernel USB subsystem.
This setup was previously done in the kernel by the fixup
code which is being removed, thus low level init must be
done by U-boot now.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The scan code of the key 'z' is 0x1d, which should be handled.
The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI
controller.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This is a multi-part message in MIME format.
commit e6e505eae94ed721e123e177489291fc4544b7b8
Author: Justin Flammia <jflammia@savantav.com>
Date: Mon Oct 29 17:19:03 2007 -0400
Found a bug in the way the DHCP Request packet is built, where the IP address
that is offered by the server is bound to prematurely. This patch is a fix of
that bug where the IP address offered by the DHCP server is not used until
after the DHCP ACK from the server is received.
Signed-off-by: Justin Flammia <jflammia@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Patch 16e23c3f removed PCSRBAR allocation. But passing zero windows
to pciauto_setup_device has the side effect of not getting
COMMAND_MEMORY set.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
The pxa255_idp being an old unmaintained board showed several issues:
1. CONFIG_INIT_CRITICAL was still defined.
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
3. Symbol flash_addr was undeclared.
4. The boards lowlevel_init function was still called memsetup.
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
'target CPU does not support interworking' warnings on recent compilers.
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
indexes rather than the register definitions from the pxa-regs header
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
avoid any ambiguities.
8. There were several redefinition warnings concerning ICMR, OSMR3,
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
9. The board configuration file was rather outdated.
10. The part header file defined the vendor, product and revision arrays
as unsigned chars instead of just chars in the block_dev_desc_t
structure.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
New board has faster oscillator and a different Flash chip. This affects:
- CFG_MPC5XXX_CLKIN
- SDRAM timings
- Flash CS configuration (timings)
- Flash sector size, and thus MTD partition layout
- malloc() arena size (due to bigger Flash sectors)
- smaller memory test range (due to bigger malloc() arena)
This patch also enables more extensive memory testing via "mtest".
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay
register must be written a value of 0x00000004 as the first step of the
SDRAM contorller configuration.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
PHYSADDR is for physical address, KSEG1ADDR is for uncached.
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.
Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.
This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.
This patch is originally submitted by Vlad Lungu <vlad@comsys.ro>, then
I made some change to leave over num_got_entries.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Vlad Lungu <vlad@comsys.ro>
Ensure that __got_start points to top of the `.got', and __got_end points
to bottom as well, so that we never fail to count num_got_entries.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try
to do anything in eth_stop() if eth_init() was not called.
Simplified RX path in order to avoid timeouts on really really
fast NE2000 cards (read: qemu with internal tftp), NetLoop() is
clever enough to cope with 1 packet per eth_rx().
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Hello,
This patch ensures the soft reset of the board for the 85xx boards
by setting the MSR[DE] in the do_reset function.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
On the MPC85xx CDS we have two issues:
1. The device tree fixup code did not check to see if the property we are
trying to update is actually found. Its possible that it would update
random memory starting at 0.
2. Newer Linux kernel's have moved the location of the PCI nodes to be
sibilings of the soc node and not children. The explicit PATH to the PCI
node would not be found for these device trees. Add the ability to handle
both paths. In the future we shouldn't handle such fixups by explicit path.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured
console. Make it so we match that config what we tell Linux as the early
STDOUT console.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The mpc85xx start code uses some magic numbers that we actually
have #defines for in <config.h> so use those instead.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.
Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
The I2C bootstrap values that can be setup via the "bootstrap" command,
were setup incorrect regarding the generation of the internal sync PCI
clock. The values for PLB clock == 133MHz were slighly incorrect and the
values for PLB clock == 166MHz were totally incorrect. This could
lead to a hangup upon booting while PCI configuration scan.
This patch fixes this issue and configures valid PCI divisor values
for the sync PCI clock, with respect to the provided external async
PCI frequency.
Here the values of the formula in the chapter 14.2 "PCI clocking"
from the 440EPx users manual:
AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz
33MHz async PCI frequency:
PLB = 133:
=> 32 <= 44.3 <= 65 (div = 3)
PLB = 166:
=> 32 <= 55.3 <= 65 (div = 3)
66MHz async PCI frequency:
PLB = 133:
=> 65 <= 66.5 <= 132 (div = 2)
PLB = 166:
=> 65 <= 83 <= 132 (div = 2)
Signed-off-by: Stefan Roese <sr@denx.de>
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.
This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.
Signed-off-by: Stefan Roese <sr@denx.de>
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 97. This result
in a refresh rate of 4 * 7.8 us at the default clock
50 MHz. At 133 MHz the value will be then 4 * 2.9 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The ATSTK1000-specific flash driver intializes bi_flashstart,
bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI
driver, don't.
Initialize these in board_init_r instead so that things will still be
set up correctly when we switch to the CFI driver.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
CFG_MEMTEST_START uses weird magic involving gd, which fails to
compile. Use hardcoded values instead (we actually know how much RAM
we have on board.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Original isp116x-hcd code prepared multiple PTDs for longer than 16
byte transfers for one endpoint. That is unnecessary because the
ISP116x is able to split long data from one PTD into multiple
transactions based on the buffer size of the endpoint. It also caused
serious problems if the endpoint NAKed some of the transactions. In
that case ISP116x wouldn't notice that the other PTDs were for the same
endpoint and would try the other PTDs possibly out of order. That would
break the whole transfer.
This patch makes isp116x_submit_job to use one PTD for one transfer.
Signed-off-by: Timo Ketola <timo.ketola@exertus.fi>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
CFG_FPGA_XILINX is a bit value used to test against the value in
CONFIG_FPGA. Testing for a value will always return TRUE. I don't
think that is the intention in this code.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
/bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
nulls in a string differently. For example, the following statement:
echo "this is a string\0" > afile
Will produce the following with /bin/bash:
"this is a string\0"
But with /bin/dash, will produce:
"this is a string
Bug fixed by moving the embedded null out of the makefile and into the
config header. Also renamed the macro to avoid usage colision with the same
macro used by other board ports.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The MCC200 board config file includes version.h for some customer-
specific setting, which causes warnings with "make depend"; build
version.h before depend.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Updates to atstk1002 U-Boot header file:
- Changed bootargs:
* Set the bootargs for at1002 to point to the SD-card partition instead
* ... of the boot flash.
* Removing the rootfstype since that argument are not needed.
Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
With recent toolchains, the environment sectors were no longer aligned to
sector boundaries. The reason was a combination of two bugs:
1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
this gets defined, is not included here (and cannot be included
without causing lots of problems).
Added a new #define CFG_USE_PPCENV for all boards which really
want to put the environment is a ".ppcenv" section.
2) The linker scripts just include environment.o, silently assuming
that the objects in that file are really in the order in which
they are coded in the C file, i. e. "environment" first, then
"redundand_environment", and "env_size" last. However, current
toolchains (GCC-4.x) reorder the objects, causing the environment
data not to start on a flash sector boundary:
Instead of: we got:
40008000 T environment 40008000 T env_size
4000c000 T redundand_environment 40008004 T redundand_environment
40010000 T env_size 4000c004 T environment
Note: this patch fixes just the first part, and cures the alignment
problem by making sure that "env_size" gets placed correctly. However,
we still have a potential issue because primary and redundant
environment sectors are actually swapped, i. e. we have now:
40008000 T redundand_environment
4000c000 T environment
40010000 T env_size
This shall be fixed in the next version.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Fix usage of do_div() in nand erase|read|write process output.
The last patch to nand_util.c introduced do_div() instead of libgcc's
implementation. But do_div() returns the quotient in its first
macro parameter and not as result.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This config option sets the default for the progress information
output behavior that can also be configured through the 'quiet'
environment variable.
The legacy NAND code does not print the current progress info
on the console. So this option is for backward compatibility for
units that are in the field and where setting the quiet variable
is not an option. With CFG_NAND_QUIET set to '1' the console
progress info is turned off. This can still be overwritten
through the environment variable.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
MPC834ITX*_config does not store config.tmp at the correct locatation,
causing MPC8349ITXGP to have the wrong TEXT_BASE.
Signed-off-by: Sam Sparks <SSparks@twacs.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
MPC834ITX*_config does not store config.tmp at the correct locatation,
causing MPC8349ITXGP to have the wrong TEXT_BASE.
Signed-off-by: Sam Sparks <SSparks@twacs.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
- update default definitions of kernel_addr and fdt_addr env. variables
- make arch/powerpc booting the default scenario
- update MTD partition layout to match the above
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Bamboo has a file sdram.c which needs special treatment when building in
separate directory. It has to be linked to build directory otherwise it is
not seen.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- convert frame size settings to be derived from a single base
- set frame size to the recommended default value
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe
- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- correct configuration space mapping
- correct bus numbering
- better access to config space
Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Convert using fixup mechanism to suppressing MCK for the duration of config
read/write transaction: while fixups work fine with the case of a precise
exception, we identified a major drawback with this approach when there's
an imprecise case. In this scenario there is the following race condition:
the fixup is (by design) set to catch the instruction following the one
actually causing the exception; if an interrupt (e.g. decrementer) happens
between those two instructions, the ISR code is executed before the fixup
handler the machine check is no longer protected by the fixup handler as it
appears as within the ISR code. In consequence the fixup approach is being
phased out and replaced with explicit suppressing of MCK during a PCIe
config read/write cycle.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
When frame larger than local RX buffer is received, it is split and handled
by two buffer descriptors. Prior to this patch the FEC driver discarded
contents of a buffer descriptor without the 'LAST' bit set, so the first
part of the frame was lost in case of larger frames. This fix allows to
safely combine the two pieces into the whole frame.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
This patch adds support for multiple serial ports to the PXA target.
FFUART, BTUART and STUART are supported.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stop using inline string functions on MIPS as other ARCHs do so,
since the optimized inline asm versions are not small.
This change is triggered by a following MIPS build error:
common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init':
common/exports.c:32: undefined reference to `strcmp'
make: *** [u-boot] Error 1
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
This patches contains several bugfixes and cleanups in the latest upstream:
- Don't include linux/config.h
- Remove buggy inline version of memscan.
- Merge with Linux 2.6.11-rc3.
- Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4.
- Goodbye mips64. 31704 lines of code bite the dust.
- Replace extern inline with static inline.
- Fix return value of strncpy.
- Remove a bunch more "$1" clobbers.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Fix incorrect blob address calculation in do_bootm_linux() that prevents
booting the kernel from a multi-file image (kernel + initrd + blob).
Also, make minor updates to the U-Boot's output and to the coding style.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Boards with CONFIG_OF_LIBFDT enabled are not able to boot old-style
kernels using the board info structure (instead of passing a device tree)
This change allows the old style booting to be used if the fdt argument
was not passed to 'bootm'.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200
Tested on: lite5200b
Note: the fixup functions have not been moved to a common place. This
patch is targeted for immediate merging as in solves a build issue, but
the final name/location of the fixups is still subject to debate. I
propose to merge this now, and move the fixups in the next merge window
to be usable by all targets.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.
The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.
Here the details of this patch:
o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
board-specific settings. As an example the sequoia board requires 0.
Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
CFG_PCI_CACHE_LINE_SIZE to 0.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The old code had a loop limit overflow bug which caused a semi-
infinite loop for small packets, because in "i<len-8", "i" was signed,
but "len" was unsigned, and "len-8" became a huge number for small
values of "len".
This is a workaround which replaces broken commit 8f1bc284.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The TFTP OACK code trusts that the incoming packet is formated as
ASCII text and can be processed by string functions. It also has a
loop limit overflow bug where if the packet length is less than 8, it
ends up looping over *all* of memory to find the 'blksize' string.
This patch solves the problem by forcing the packet to be null
terminated and using strstr() to search for the sub string.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The Linux PCF8563 RTC driver doesn't do autoprobing, so we need
to supply the RTC I2C address as bootline parameter. This patch
adds support for this rtc probing parameter to the bootargs:
"rtc-pcf8563.probe=0,0x51"
Signed-off-by: Stefan Roese <sr@denx.de>
this had slipped through the cracks, since the sbc board was added
after I wrote the original patch to remove all these symbols, and
before it was merged.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
correct consoledev needed for linux boot.
Standardize on fdt{file,addr} var to hold dtb file name.
Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
if a board/$(VENDOR)/common/Makefile exists, build it.
also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.
thusly get rid of alternate build dir errors such as:
FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory
by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
TFTP does not work anymore after multicast tftp
patch was applied on little endian systems.
This patch fix it.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The logic to check if there is a correct MAC address in the DM9000
EEPROM, added in the last patch, is wrong. Now the MAC address is
always taken from the environment, even if a suitable MAC is present
in the EEPROM.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix the following warnings:
- usb.c:xx: warning: function declaration isn't a prototype
- usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
from pointer wihtout a cast
Signed-off-by: Martin Krause <martin.krase@tqs.de>
CPU physical address space was being wasted by allocating a
PCSRBAR PCI inbound region to it's memory space.
As a rule, PCSRBAR should be left alone since it does not affect
transactions from self and other masters may have changed it.
Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
This patch fixes the "type qualifiers ignored on fuction return tpye"
warning for include/s3c2410.h
Signed-off-by: Martin Krause <martin.krause@tqs.de>
omap2420h4 switched to cfi, so remove old (already disabled) flash.c
and flash_probe() calls in env_flash.c.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
define there own I/O functions.
(Needed for the pcs440ep board).
- The default I/O Functions are again 8 Bit accesses.
- Added CONFIG_CMD_IDE for the pcs440ep Board.
Signed-off-by: Heiko Schocher <hs@denx.de>
As experienced on lwmon5, on some boards the POST memory test can
corrupt the global data buffer (bd). This patch fixes this issue
by checking and limiting this area.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Since this RTC POST test is taking quite a while to complete
it's only initiated upon special keypress same as the complete
memory POST.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
board. Now the "eeprom" command can be used to read/write from/to this
device. Additionally a new command was added "eepromwp" to en-/disable
the write-protect of this 2nd EEPROM.
The 1st EEPROM is not affected by this write-protect command.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the matrix keyboard on the lwmon5 board.
Since the implementation in the dsPCI is kind of compatible with the
"old" lwmon board, most of the code is copied from the lwmon
board directory.
Signed-off-by: Stefan Roese <sr@denx.de>
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.
this consequently eliminates CONFIG_ADD_RAM_INFO.
Thanks to Stefan for the hint.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch has been sent on:
- 6 Jun 2007
Many users of PCI config read routines tend to ignore the function
ret value, and are only concerned about the contents of *val. Based
on this, pci_hose_read_config_{byte,word}_via_dword should initialize
the *val on dword read error.
Without this fix, for example, we'll go on scanning bus with vendor or
header_type uninitialized. This brings many unnecessary config trials.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
introduced in the implement board_add_ram_info patch as I was cleaning out the
magic numbers. sorry.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:
DRAM: 256 MB (DDR1, 64-bit, ECC on)
and for boards with SDRAM on the local bus, a line such as this is
added:
SDRAM: 64 MB (local bus)
also replaced some magic numbers with their equivalent define names.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.
Signed-off-by Tony Li <tony.li@freescale.com>
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs. Do this for 83xx and 86xx, too,
since they will eventually do something similar.
Signed-off-by: Andy Fleming <afleming@freescale.com>
The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.
So make it use far less IO & memory space and have it use the shared LAW. This
free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
by each bus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the device tree on boot for TSEC1
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Minor cleanups to confirm to the u-boot coding style.
Some german expressions -> english.
HCU5 enforces a unique IP adress for a given slot in the rack.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Make ecc initialisation robust, as DDR2-ECC errors may be generated
while zeroing the RAM.
Return 16 bytes (a cacheline) less than the available memory, as the
board and/or PPC440EPx might have problems accessing the last bytes.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
The TSEC driver's PHY code waits a long time for autonegotiation to
complete, even if the link is down. The PHY knows the link is
down or up before autonegotiation completes, so we can short-circuit
the process if the link is down.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?
uec_init() did not follow the spec for eth_init(), and returned
0 on success. Switch it to return the link like tsec_init()
(and 0 on error)
The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568
CONFIG_QE was off
CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled
Signed-off-by: Andy Fleming <afleming@freescale.com>
The tsec_info structure and array has a "flags" field for each
ethernet controller. This field is the only reason there are
settings. Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Changes to the TSEC driver affect almost all 83xx, 85xx, and 86xx boards.
Now we can do a MAKEALL test on all of them!
Signed-off-by: Andy Fleming <afleming@freescale.com>
The fix, "Fix where the #ifdef CFG_BOOTMAPSZ is placed"
neglected to *also* put the code inside the similar #ifdef
for CONFIG_OF_FLAT_TREE.
Signed-off-by: Andy Fleming <afleming@freescale.com>
bzip2 requires a significant chunk of malloc space, and there isn't
enough room on mpc885ads (with only 8MB RAM) for both bzip2's malloc area
and a downloaded image at 0x400000.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This small CPCI750 update extends the board specific command
"show_config" to display the Marvell strapping registers and
extends the PCI IDE controller.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
this enables libfdt code by default for the
freescale mpc8313erdb, mpc832xemds, mpc8349emds,
mpc8349itx and gp boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.
Boards remain compatible with OF_FLAT_TREE.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly. This patch also adds a /memory node if
it doesn't already exist prior to update.
plus some cosmetic trimming to single line comments.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 073e1b5099 "Fix initrd/dtb
interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
when it should have gone inside of the conditional. As a result, it
broke non-LIBFDT board builds.
Also added a missing "not." to the comment.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The original code would wrongly relocate the blob to be right before
the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ,
if it is defined. So we make two changes:
1) flag the blob for relocation whenever its address is above BOOTMAPSZ
2) If the blob is being relocated, relocate it before kbd, not initrd
Signed-off-by: Andy Fleming <afleming@freescale.com>
When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.
Signed-off-by: Stefan Roese <sr@denx.de>
Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.
Signed-off-by Randy Vinson <rvinson@mvista.com>
Author: Randy Vinson <rvinson@linuxbox.(none)>
Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
Arcadia main board.
Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: York Sun <yorksun@freescale.com>
This patch is against u-boot-mpc85xx.git of www.denx.com
Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.
Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).
Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
"\m" in the paths. Made the defaults not Windows-specific (or
anything-specific)
Signed-off-by: Andy Fleming <afleming@freescale.com>
Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.
Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.
Allow TEXT_BASE value to be specified on command line. This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.
Clear and enable lbc and ecm errors.
Update last_busno in device-tree for pci and pcie.
Remove load of obsolete cpu/mpc85xx/pci.0
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
Enable LBC and ECM errors and clear error registers.
Add tftpflash env var to get uboot from tftp server and flash it.
Add pci/pcie convenience env vars to display register space:
"run pcie3regs" to see all pcie3 ccsr registers
"run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h
Enable CONFIG_INTERRUPTS.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
From: Ed Swarthout <Ed.Swarthout@freescale.com>
Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.
Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl
Move additional code from .text to boot page to make room for
exception vectors at start of image.
Handle Machine Check, External and Critical exceptions.
Fix e500 machine check error determination in traps.c
TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
from the bootp server
Signed-off-by: Wilson Callan <wcallan@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)
This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Instead of always using the largest blocksize the card supports, check
if it can support smaller block sizes and use 512 bytes if possible.
Most cards do support this, and other parts of u-boot seem to have
trouble with block sizes different from 512 bytes.
Also enable underrun/overrun protection.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
This patch was originall provided by David Mitchell <dmitchell@amcc.com>
and fixes a bug in the PLL clock calculation.
Signed-off-by: Stefan Roese <sr@denx.de>
The update procedure was modified to turn off the USB subsystem
before exit for MCC200 and TRAB. This is necessary as otherwise the
USB controller continues to write periodically to system memory!
MCC200-specific notes:
- the patch disables the magic key check for MCC200
- the patch contains the configuration changes made
for the new revision of the board.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The last fdt patch to bootm did board setup based on the address
specified by a prior fdt address command invocation. The bootm
code, as its call to fdt_chosen does, should use the fdt specified
by the user on the bootm command. Note this restores full
functionality for the 8360's existing default boot environment
values, e.g. 'run nfsboot' (i.e. no having to 'fdt addr $fdtaddr'
before booting a kernel).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
In the patch titled "Create new fdt boardsetup command..." I removed the
call to ft_board_setup() from the routine fdt_chosen(), but I forgot
to add a direct call back into cmd_bootm.c
This fixes the oversight by adding the direct call to the bootm command.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Previously ft_board_setup() was called by fdt_chosen() which was not
really correctly structured. This splits ft_board_setup() out by creating
a new fdt boardsetup command.
Fix a bug when parsing fdt set command values which have the square
bracket form [00 11 22 33] - the length was updated incorrectly in when
parsing that form.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The fdt_chosen() function was adding/seting some properties ad-hoc
improperly and duplicated (poorly) what was done in ft_board_setup()
Clean up long lines (setting properties, printing errors).
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The new name matches more closely the kernel's name, which is also
a much better description.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Break lines that were greater than 80 characters in length.
Move the fdt print and property parsing code to separate static functions
to reduce coding clutter in the fdt_cmd handling body.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Do *NOT* return after the "point of no return" has been passed.
If something goes wrong, the board must be reset after that point.
Move the "Transferring control to Linux" debug message back to where it
belongs: just before transferring control to linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Make the length parameter optional: if not specified, do the move using
the current size unchanged.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Declare the variable fdt properly as extern.
Call the "set_fn" function pointer the "short way" without the full
dereferencing syntax.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Print more than the raw libfdt error message strings. This is especially
useful for cluing in the user when the bootm command aborts due to
blob problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This is the way u-boot reduces configured-out code. At Wolfgang
Grandegger and Wolfgang Denk's request, make libfdt conform.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Add support for the following DaVinci boards:
- DV_EVM
- SCHMOOGIE
- SONATA
Changes:
- Split into separate board directories
- Removed changes to MTD_DEBUG (or whatever it's called)
- New CONFIG_CMD party line followed
- Some cosmetic fixes, cleanup etc.
- Patches against the latest U-Boot tree as of now.
- Fixed CONFIG_CMD_NET in net files.
- Fixed CONFIG_CMD_EEPROM for schmoogie.
- Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
DV_EVM. Can't check if it works on SONATA, don't have a board any more,
but it at least compiles.
Here is an excerpt from session log on SCHMOOGIE...
U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17)
DRAM: 128 MB
NAND: 128 MiB
In: serial
Out: serial
Err: serial
ARM Clock : 297MHz
DDR Clock : 162MHz
ETH PHY : DP83848 @ 0x01
U-Boot > iprobe
Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
U-Boot > ping 192.168.253.10
host 192.168.253.10 is alive
U-Boot >
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
Do not enable normal errors created during probe (master abort, perr,
and pcie Invalid Configuration access).
Add CONFIG_PCI_NOSCAN board option to prevent bus scan.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
When I rebased Ed's patch and cleaned up a few compilation
problems, I apparently rebased my brain on crack first.
Fix that by doing (char *) sized pointer math as needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Use generic 64bit division in nand_util.c. This makes nand_util.c
independent of any toolchain 64bit division.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Move the 64bit division from lib_avr32 to lib_generic. With this, all
boards can do_div/__div64_32 if needed, not only avr one. Code is put
to lib_generic, so no larger memory footprint if not used. No code
modifications. Thanks for proposal by Håvard Skinnemoen.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
This series of patches adds support for 2 boards from Netstal Maschinen.
The HCU4 has a PPC405Gpr and
the HCU5 has a PPC440EPX.
The HCU4 has a somehow complicated flash setup, as the booteprom is
only 8 bits and the CFI 16 bits wide, which makes it impossible to use a more
elegant solution.
The HCU5 has only a booteprom as the whole code will be downloaded from a
different board which has HD, CD-ROM, etc and where all code is stored.
This is my third try. I incorporated all suggestions made by Wolfgang and Stefan.
Thanks them a lot.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
The patch adds support for UART POST on ppc44x-based boards with no
external serial clocks installed.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
make: *** No rule to make target `/work/wd/tmp/board/mpc8349itx/u-boot.lds', needed by `/work/wd/tmp/u-boot'. Stop.
Both the ITX and ITX-GP fail when you use "make O=<some dir> ..." or
"BUILD_DIR=<some dir> ./MAKEALL ..."
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove the duplicated source code of ecc command on the <board>.c,
for reused, move these code to cpu/mpc83xx directory.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
five 10/100 ethernet ports connected via an ICPlus IP175C
switch, one PCI slot, and serial. Features not supported
in this patch are SD card interface, 2 USB ports, and the
two phone ports.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
..and not the global fdt. Rename local fdt vars to blob so as not to
be confused with the global var with the same three-letter name.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Several node strings were not correct (trailing slashes and properties
in the strings)
Added setting of the timebase-frequency.
Improved error messages and use debug() instead of printf().
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The new name matches more closely the kernel's name, which is also
a much better description.
These are the mpc83xx changes made necessary by the function name change.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx processor family has many reset sources, such as
power on reset, software hard reset, software soft reset,
JTAG, bus monitor, software watchdog, check stop reset,
external hard reset, external software reset.
sometimes, to figure out the fault of system, we need to
know the cause of reset early before the prompt of
u-boot present.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
According to the latest user manual, the SDMA temporary
buffer base address must be 4KB aligned.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When the rev2.x silicon mount on the MPC8360EMDS baord,
and if you are using the u-boot version after the commit
3fc0bd1591.
to make the ethernet interface usable, we have to setup
the jumpers correctly.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The i2c_init() function in fsl_i2c.c programs the two I2C busses differently.
The second I2C bus has its slave address programmed incorrectly and is
missing a 5-us delay.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the
bitfields for all 83xx processors. The code to update some bitfields was
compiled only on some processors. Now, the bitfields are programmed as long
as the corresponding CFG_SCCR option is defined in the board header file.
This means that the board header file should not define any CFG_SCCR macros
for bitfields that don't exist on that processor, otherwise the SCCR will be
programmed incorrectly.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC83xx: Fix the Makefile config sections to generate the include/config.h
file in the build directory instead of the source directory.
Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The change entitled "Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx"
broke multiple PHY support in tsec.c. This fixes it.
Signed-off-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Allow the address of the Ten Bit Interface (TBI) to be changed in the
event of a conflict with another device.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
The bios emulator in the MAI board can not pass compile
and have a lot of crap in it. remove it and will have a
clean and small bios emulator in the drivers directory
which can be uesed for every board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
This patch add definition of the BIOS emulator and the ATI framebuffer
driver for MPC8641HPCN board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Additionally export the following fuctions (to make trab_config build again):
- simple_strtol()
- strcmp()
Also bump the ABI version to reflect this change
Signed-off-by: Martin Krause <martin.krause@tqs.de>
All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c. In a subsequent patch, this will be
utilized by the 85xx ports as well.
Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.
Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.
Fixed a u16 vendor compiler warning in AHCI driver too.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Add the ability for modules from the Schindler cm5200 family to use a
single U-Boot image:
- rename cm1_qp1 to cm5200
- add run-time module detection
- parametrize SDRAM configuration according to the module we are running on
Few minor, board-specific fixes included in this patch:
- better MAC address handling
- updated default environment ('update' command uses +{filesize} now)
- improved error messages in the auto-update code
- allow booting U-Boot from RAM (CFG_RAMBOOT)
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
During config transactions on the PCIe bus an attempt to scan for a
non-existent device can lead to a machine check exception with certain
peripheral devices. In order to avoid crashing in such scenarios the
instrumented versions of the config cycle read routines are introduced, so
the exceptions fixups framework can gracefully recover.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0a
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)
Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)
Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map
Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.
Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
This patch fixes the negative consequences for 8xx of the recent
"ppc4xx: Clean up 440 exceptions handling" commit.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
The new boardspecific DDR2 controller configuration is used for the Yucca
board. Now the Yucca board with 440SPe Rev. A chips is also supported.
Signed-off-by: Stefan Roese <sr@denx.de>
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
support non default, boardspecific DDR(2) controller configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.
Signed-off-by: Stefan Roese <sr@denx.de>
This change fixes a bug in the receive buffer handling, that
could lead to problems upon high network traffic (broadcasts...).
Signed-off-by: Stefan Roese <sr@denx.de>
The Marvel 88E1111S driver for the TSEC was copied from the
88E1101 driver, and included a fix for an erratum which does not
exist on that part. Now it is removed
Signed-off-by: Andy Fleming <afleming@freescale.com>
Made the boot commands use device trees by default.
Also moved the ramdisk to 1000000 (I think the previous address
was getting overridden during boot).
Signed-off-by: Andy Fleming <afleming@freescale.com>
Jarrold Wen noticed that the generic PHY code always matches
under the current implementation. Change it so the first match
wins, and *only* unknown PHYs trigger the generic driver
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Adds code to modify CPM frequencies
* Cleans up the config file to #define TSEC and (for now) #undef FCC
* Adds the MII command for all 8560 ADS configurations
* Updates config file to provide convenience commands for booting
with a device tree
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
where the reset was being done after the errata code instead of
before.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
FSL PCIe block has extended cfg registers in the 100 and 400 range.
For example, to read the LTSSM register: pci display <busn>.0 404 1
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ensure hose->current_busno is not less than first_busno. This fixes
broken board code which leaves current_busno=0 when first_busno is
greater than 0 for the cases with multiple controllers.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
- now the Flash ST M29W040B is supported (not tested)
- fix the "led" command
- fix compile error, if BUILD_DIR is used
Signed-off-by: Heiko Schocher <hs@denx.de>
The relocation fixup didn't handle the malloc pointer initialization
correctly. This patch fixes this problem. Tested successfully on 4xx.
The relocation fixup patches for 4xx will follow soon.
Signed-off-by: Stefan Roese <sr@denx.de>
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
Include immap.h and timer.h. Moved dtimer interrupt setup to dtimer_intr_setup() from cpu/mcf532x/interrupts.c. Changed (CFG_CLK /1000000) -1 << 8 to CFG_TIMER_PRESCALER
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Since it is already in m68k folder, un-necessary to pad mcf. Replaced immap_5329.h and m5329.h to immap.h
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Renamed mcfserial.c to mcfuart.c. Modified Makefile for mcfuart.o from mcfserial.o. Replace immap_5329.h and m5329.h to immap.h
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
There is a Common Flash Interface Driver existed. To use the CFI driver, define CFG_FLASH_CFI in configuration file.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
All of the choices for CONFIG_BOOTP_ are now documented in
the README file. You must now individually select exactly
the set that you want using a series of
#define CONFIG_BOOTP_<x>
statements in the board port config files now.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch prepares the migration from the legacy NAND driver
to U-Boot's new NAND subsystem for esd boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
For some reason, CONFIG_POST permeated as CONFIG_CMD_POST_DIAG
when it really means just CONFIG_CMD_DIAG. There is no CMD_POST.
Clear this mess up some.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Since ADS860.h includes "board/fads/fads.h" with ramifications
on the CONFIG_COMMAND treatment, it too has to be adjusted to
exclude already configured commands in this same commit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The old implementation of command nboot does not support reading the image from
NAND flash with skipping of bad blocks. The patch implements a new version of
the nboot command: by calling nboot.jffs2 from the u-boot command line the
command will load the image from NAND flash with respect to bad blocks (by using
nand_read_opts()). This is similar to e.g. the NAND read command: "nand
read.jffs2 ...".
Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Add optional ECC generation routine to preserve existing
RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added
Signed-off-by: Stefan Roese <sr@denx.de>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Derive three new files from cmd_confdefs.h:
config_bootp.h - Has BOOTP related config options, not commands
config_cmd_all.h - Has a CONFIG_CMD_* definition for every command
config_cmd_default.h - Has a CONFIG_CMD_* definition for default cmds.
For now, include "config_bootp.h" for compatability until all
users of it directly include it properly.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch prints the DDR status registers upon machine check
interrupt on the 440EPx/GRx. This can be useful especially when
ECC support is enabled.
I added some small changes to the original patch from Niklaus to
make it compile clean.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes the problem to assemble cpu/ppc4xx/start.S
experienced last week where building failed having specified
O=../build.sequoia.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.
This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
A new environment variable, "logversion", selects the log buffer
behaviour. If it is not set or set to a value other than 2, then the
old, Linux 2.4.4, behaviour is selected.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Signed-off-by: Heiko Schocher <hs@denx.de>
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.
Signed-off-by: Stefan Roese <sr@denx.de>
since nand_init() is expected to be called by other parts of u-boot, there
should be a prototype for it in nand.h
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a board command to configure the I2C bootstrap EEPROM
values. Right now 533 and 667MHz are supported for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 533 nor ;to configure the board for 533MHz NOR booting
=> bootstrap 667 nand ;to configure the board for 667MHz NNAND booting
Signed-off-by: Stefan Roese <sr@denx.de>
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.
Signed-off-by: Stefan Roese <sr@denx.de>
- Introduced dedicated switches for building 440 and 405 images required
for 440-specific machine instructions like 'rfmci' etc.
- Exception vectors moved to the proper location (_start moved away from
the critical exception handler space, which it occupied)
- CriticalInput now serviced (with default handler)
- MachineCheck properly serviced (added a dedicated handler and return
subroutine)
- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
unhandled and those not relevant for 4xx were eliminated)
- Eliminated Linux leftovers, removed dead code
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
is extended with the default GPIO output state (level).
Signed-off-by: Stefan Roese <sr@denx.de>
Now program_tlb() allows to program a TLB (or multiple) with
different virtual and physical addresses. With this change, now one
physical region (e.g. SDRAM) can be mapped 2 times, once with caches
diabled and once with caches enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Set the correct value in GPIOx_TCR when configuring the gpio
with CFG_440_GPIO_TABLE.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This is a cosmetic only changes submission.
It affects files relevant to bcm570x driver.
the commands used to generate this change was
cd drivers
Lindent -pcs -l80 bcm570x.c bcm570x_lm.h bcm570x_mm.h tigon3.c tigon3.h
The BMW target (the only one using this chip so far) builds cleanly, the
`before and after' generated object files for drivers/bcm570x.c and
drivers/tigon3.o are identical as reported by objdump -d
Signed-off-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
This patch adds NAND booting support for the AMCC Acadia eval board.
Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.
I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 267 nor ;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
Signed-off-by: Stefan Roese <sr@denx.de>
This patch added USB PCI-OHCI chips support, interrupt pipe support
and usb event poll support. For supporting the USB interrupt pipe, the
globe urb_priv is moved to purb in ed struct. Now, we can process
several urbs at one time. The interrupt pipe support codes are ported
from Linux kernel 2.4.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
This patch adds USB event poll support, which could be used in usbkbd
and other usb devices driver when the asynchronous interrupt
processing is supported.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com
Using some (very) slow USB keys cause the USB host controller buffers
are not ready to be read by the CPU so we need an extra delay before
reading the USB storage data.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
e600 does not have a bootpg restriction.
Move the version string to beginning of image at fff00000.
Resetvec.S is not needed.
Update flash copy instructions.
Add tftpflash env variable
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The attached patch is mainly cosmetic, allowing u-boot to
display the correct bootstrap option letter according to the
datasheets.
The original patch was extended with 405EZ support by Stefan
Roese.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Current include/configs/MPC8349ITX.h does contain some support for building
image that will be started from memory (without putting in into flash).
It could be triggered by building with TEXT_BASE set to a low value.
However, this support is incomplete: using of low TEXT_BASE causes
defining configuration macros in inconsistent way, which later leads
to compilation errors. In particular. flash support is being disabled,
but then flash structures get referenced.
This patch fixes this, making it possible to build with low TEXT_BASE.
Signed-Off-By: Nikita Youshchenko <yoush@debian.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
suggested by AMCC it is not recommended to dynamically change the EBC
speed after bootup. So we undo this change to be on the safe side.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
The U-Boot NAND booting support is now extended to support ECC
upon loading of the NAND U-Boot image.
Tested on AMCC Sequoia (440EPx) and Bamboo (440EP).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the "normal" Bamboo NOR booting port, so
that it is compatible with the coming soon NAND booting
Bamboo port.
It also enables the 2nd NAND flash on the Bamboo.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds hardware ECC support to the NDFC driver. It also
changes the register access from using the "simple" in32/out32
functions to the in_be32/out_be32 functions, which make sure
that the access is correctly synced. This is the only recommended
access to SoC registers in the current Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the nand_ecc code to the latest Linux version.
The main reason for this is the more compact code. This makes
it possible to include the ECC code into the NAND bootloader
image (NAND_SPL) for PPC4xx.
Signed-off-by: Stefan Roese <sr@denx.de>
Enable redundant environment, add a MTD partition for it; also add env.
variable command for passing MTD partitions to the kernel command line.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Allow passing longer command line to the kernel - useful especially
for passing MTD partition layout.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A
have a page write capability of two bytes", and "This device offers fast (1ms)
byte write". Add 3ms of extra delay.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which
networking does not function. This commit switches PHY to TX mode by clearing
the FX_SEL bit of Mode Control Register. It also reverses commit
008861a2f3, i.e., a temporary workaround.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining
them does not cause PCI or IPB clocks to run at the specified speed.
Instead, they configure divisors used to calculate said clocks. This
patch renames the defines according to their real function.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
As pointed out by Bruce Adler <bruce.adler@acm.org> this patch
fixes a small bug in the 405EZ OCM initialization. Thanks for
spotting.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the Acadia (405EZ) support for the new 1.1 board
revision. It also adds support for NAND FLASH via the 4xx NDFC.
Please note that the jumper J7 must be in position 2-3 for this
NAND support. Position 1-2 is for NAND booting only. NAND booting
support will follow later.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for 405 PPC's to the 4xx NAND driver
ndfc.c. This is in preparation for the new AMCC 405EZ.
Signed-off-by: Stefan Roese <sr@denx.de>
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Because the Sequoia board does not boot with an EBC faster than 66MHz,
the clock divider are changed after the initial boot process.
This allows for maximum clocking speeds to be achieved on newer boards.
Sequoia boards with 666.66 MHz processors require that the EBC divider
be set to 3 in order to start the initial boot process at a slower EBC
speed. After the initial boot process, the divider can be set back to 2,
which will cause the boards to run at 83.333MHz. This is backward
compatible with boards with 533.33 MHz processors, as these boards will
already be set with an EBC divider of 2.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Bridge, ICH-5, ICH-6 and ICH-7.
Implementation:
1. Code is divided in to two files. All functions, which are
controller specific are kept in "drivers/ata_piix.c" file and
functions, which are not controller specific, are kept in
"common/cmd_sata.c" file.
2. Reading and Writing from the S-ATA drive is done using PIO method.
3. Driver can be configured for 48-bit addressing by defining macro
CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
addressing.
4. S-ATA read function is hooked to the File system, commands like
ext2ls and ext2load file can be used. This has been tested.
5. U-Boot command "SATA_init" is added, which initializes the S-ATA
controller and identifies the S-ATA drives connected to it.
6. U-Boot command "sata" is added, which is used to read/write, print
partition table and get info about the drives present. This I have
implemented in same way as "ide" command is implemented in U-Boot.
7. This driver is for S-ATA in native mode.
8. This driver does not support the Native command queuing and
Hot-plugging.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
Hi,
There is a bug in the code of clearing the bss section for processor
i386.(File: cpu/i386/start.S)
In the code, bss_start addr (starting addr of bss section) is put into
the register %eax, but the code which clears the bss section refers to
the addr pointed by %edi.
This patch fixes this bug by putting bss_start into %edi register.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
Search the exception table with linear algorithm instead of
bisecting algorithm.
Because the exception table might be unsorted.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The attached patch fixes the compile of the JSE board in the
denx git as of 14 may 2007. It is an extremely simple patch,
it just adds the missing define of CFG_SYSTEMACE_WIDTH.
Fix to compile JSE against 20070514 git of u-boot
current PHY initalization code (tftp timeouts all the time). This commit
temporarily disables PHY initalization sequence to make the networking
operational, until a fix is found.
A '3' got cut off in the formatting of the last patch to automatically
change the clock speed of the system clock on sequoia board.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
update setenv() function so that entering a NULL value for the
variable's value will delete the environmental variable
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Acked-by: Stefan Roese <sr@denx.de>
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The AMCC Secquoia board has been changed in a new revision from using a
33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD
indicates the difference. This patch reads that bit and uses the correct
clock speed for the board. This code is backward compatable will all
prior boards. All prior boards will be read as 33.000.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.
Signed-off-by: Stefan Roese <sr@denx.de>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
In case that there is no memory based bad block table available the
function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call
nand_block_bad() directly. When parameter 'getchip' is set to zero,
nand_block_bad() will not right shift the offset to calculate the
correct page number.
Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
When using FDT Images, the length of an inital ramdisk was
overwritten (bug introduced by commit 87a449c8, 22 Aug 2006).
Patches by Timur Tabi & Johns Daniel.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Enable hush shell, environment in flash rather in EEPROM,
more user-friendly default environment, etc.
The simple EEPROM environment can be selected easily in the board
config file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
There were a few theoretical possibilities that the compiler might
optimize away DMA descriptor reads and/or writes and thus cause
synchronization problems with the hardware. Insert barriers where
we depend on reads/writes actually hitting memory.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
When bringing up u-boot on new boards, PHY support sometimes gets
neglected. Most PHYs don't really need any special support,
though. By adding a generic entry that always matches if nothing
else does, we can provide support for "unsupported" PHYs for the
tsec.
The generic PHY driver supports most PHYs, including gigabit.
Signed-off-by: David Updegraff <dave@cray.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
on some ITX boards, notably those with a revision 3.1 CPU.
Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Michael Benedict <MBenedict@twacs.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Clarified that conversion is to DRAM clocks rather than platform clocks.
Made function static to spd_sdram.c.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Changed the code to read the registers and calculate the clock
rates, rather than using a "switch" statement.
Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The other pagesz constants use one letter to specify order of
magnitude. Also change the one reference to it in mpc8548cds/init.S
Signed-off-by: Andy Fleming <afleming@freescale.com>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Add board port under new board/freescale directory
structure and reuse existing PIXIS FPGA support there.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit
52c7a68b8d which failed to update the #define's
describing the local address window used for the PCI I/O space accesses -- fix
this and carry over the necessary changes into the MPC8560ADS code since the
PCI I/O space mapping was also broken for this board (by the earlier commit
087454609e). Add the comments clarifying how
the PCI I/O space must be mapped to all the MPC85xx board config. headers.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
board/mpc8540ads/init.S | 4 ++--
board/mpc8560ads/init.S | 4 ++--
include/configs/MPC8540ADS.h | 5 ++---
include/configs/MPC8541CDS.h | 2 +-
include/configs/MPC8548CDS.h | 2 +-
include/configs/MPC8560ADS.h | 8 ++++----
6 files changed, 12 insertions(+), 13 deletions(-)
The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop. This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.
Signed-off-by: Swarthout Edward <swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Fix the 85xxcds tsec bug.
When enable PCI, tsec.o should be added to u-boot.lds to make tsec work.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Board code can now request the generic setup code rather than having to
copy-and-paste it for themselves. Boards should be converted to use this
once they're tested with it.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Rather than misleadingly define PVR_83xx as the specific type of 83xx
being built for, the PVR of each core revision is defined. checkcpu() now
prints the core that it detects, rather than aborting if it doesn't find
what it thinks it wants.
Signed-off-by: Scott Wood <scottwood@freescale.com>
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
update setenv() function so that entering a NULL value for the
variable's value will delete the environmental variable
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Acked-by: Stefan Roese <sr@denx.de>
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
G2 core reference manual says decrementer and time base
are decreasing/increasing once every 4 bus clock cycles.
Lets fix it, so time in Linux won't run twice as fast
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
What was suppose to be a stack variable was declared as a pointer,
overwriting random memory.
Also moved the libfdt.a requirement into the main Makefile. That is
The U-Boot Way.
Previous versions used full wait states for the chip select #1 which
is connected to the Xilinix SystemACE controller on the AMCC Katmai
evaluation board. This leads to really slow access and therefore low
performance. This patch now sets up the chip select a lot faster
resulting in much better read/write performance of the Linux driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:
U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)
CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
Bootstrap Option E - Boot ROM Location EBC (32 bits)
16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board
Signed-off-by: Stefan Roese <sr@denx.de>
U-Boot part of Lite5200b low power mode support.
Puts SDRAM out of self-refresh and transfers control to
address saved at physical 0x0.
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Use "setter" functions instead of flags, cleaner and more flexible.
It also fixes the problem noted by Timur Tabi that the ethernet MAC
addresses were all being set incorrectly to the same MAC address.
In bootm, create the "/chosen" node only if it doesn't already exist
(better matches the previous behavior).
Update for proper reserved memory map handling for initrd.
Set up the portmux for the MMC interface and enable the MMC driver
along with support for DOS partitions, ext2 and FAT filesystems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.
The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the mmci pins, as well as
functions for getting the clock rate of the mmci controller.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement MACB initialization for AVR32 and ATSTK1000, and turn
everything on, including the MACB driver.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Driver for the Atmel MACB on-chip ethernet controller.
This driver has been tested on the ATSTK1000 board with a AT32AP7000
CPU. It should probably work on AT91SAM926x as well with some minor
modifications.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Instead of creating yet another set of MII register definitions
in the macb driver, here's a complete set of definitions for everyone
to use.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Include the imi, imls and jffs commands sets by default on ATSTK1000.
Also define CONFIG_BOOTARGS to something more useful, define
CONFIG_BOOTCOMMAND and enable autoboot by default.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Conform to the "standard" interface and use initdram() instead of
board_init_memories() on AVR32. This enables us to get rid of the
sdram_size member of the global_data struct as well.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Convert spaces to tabs (must have missed this one last time around),
sort the entries by address and group them together by bus
connectivity.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add -fPIC -mno-init-got to the avr32-specific CFLAGS to make u-boot
position independent. This will make relocation a lot easier.
-mno-init-got means that gcc shouldn't emit code to load the GOT
address into r6 in every function prologue. We do it once and for
all in the early startup assembly code, so enabling this option
makes u-boot a bit faster and smaller.
The assembly parts have always been position-independent, so no code
changes should be necessary.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
It doesn't really matter which toolchain you use to compile u-boot,
but the avr32-linux one is probably what most people have installed.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Split the avr32 initialization code into a function to run before
relocation, board_init_f and a function to run after relocation,
board_init_r. For now, board_init_f simply calls board_init_r
at the end.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Fix bug introduced by "Fix get_partition_info() parameter error in all
other calls" from 2005-03-04 in cmd_ide.c and cmd_scsi.c, which prevented
to use diskboot or scsiboot form another device than 0.
Signed-off-by: Denis Peter <d.peter@mpl.ch>
There are a few bugs in the cpu/mpc83xx/spd_sdram.c
the first bug is that the picos_to_clk routine introduces a huge
rounding error in 83xx.
the second bug is that the mode register write recovery field is
tWR-1, not tWR >> 1.
This patch fixes changes the i2c_init(...) function to use the function
get_OPB_freq() rather than calculating the OPB speed by
sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
specific per processor. The prior method was not and so was calculating
the wrong speed for some PPC4xx processors.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move the 8641HPCN's PIXIS code to the new directory
board/freescale/common/ as it will be shared by
future boards not in the same processor family.
Write a "pixis_reset" command that utilizes the FPGA
reset sequencer to support alternate soft-reset options
such as using the "alternate" flash bank, enabling
the watch dog, or choosing different CPU frequencies.
Add documentation for the pixis_reset to README.mpc8641hpcn.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Changed _fdt_check_header() to fdt_check_header() and made it part of
the interface - it is a useful routine.
Also did some asthetics cleanup to the include files (headers).
Added information about usage of NetConsole on systems where the -l and -p
switches are mutually exclusive.
Signed-off-by: Igor Marnat <marny@rambler.ru>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
With this new base address of the Xilinx SystemACE controller
the Linux driver will be easier to adapt, since it can now be
mapped via the "normal" ioremap() call.
Signed-off-by: Stefan Roese <sr@denx.de>
The fdt command uses David Gibson's libfdt library to manipulate as well
as print the flattened device tree. This patch is the new command,
the second part is the modifications to the existing code.
Enhanced the formerly private function _fdt_next_tag() to allow stepping
through the tree, used to produce a human-readable dump, and made
it part of the published interface.
Also added some comments.
The board specific "bootstrap" command is now fixed and can
be used for the AMCC Katmai board to configure different
CPU/PLB/OPB frequencies.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Signed-off-by: Stefan Roese <sr@denx.de>
The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.
Signed-off-by: Stefan Roese <sr@denx.de>
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Without this patch, I am unable to get to the prompt on rev 2 silicon.
Only set ddrioovcr for rev1.
Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch adds support for the new AMCC Acadia eval board.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Signed-off-by: Stefan Roese <sr@denx.de>
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Signed-off-by: Stefan Roese <sr@denx.de>
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
Signed-off-by: Stefan Roese <sr@denx.de>
Add ICMP_ECHO_REQUEST packet support by responding with a ICMP_ECHO_REPLY.
This permits the ping command to test the phy interface when the phy
is put in loopback mode (typically by setting register 0 bit 14).
It also allows the port to respond to an external ping when u-boot is
processing some other net command (such as tftp). This is useful when
tftp appears to hang.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
Signed-off-by: Stefan Roese <sr@denx.de>
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.
For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.
Signed-off-by: Stefan Roese <sr@denx.de>
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM
Were not being used when setting the appropriate register
Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM
To allow full config of the SCCR.
Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.
Signed-off-by: Timur Tabi <timur@freescale.com>
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
it pass DDR/DDR2 compliance tests.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
MPC8360E rev2.0 have new spridr,and PVR value,
The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
MPC8349E rev3.1 have new spridr,and PVR value,
The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.
Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
which is used to se if an slave will ACK after receiving its address.
Correct i2c probing to use this method as the old method could upset
a slave as it wrote a data byte to it.
Add a small delay in i2c_init() to let the controller
shutdown any ongoing I2C activity.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Add support for the MPC8349E-mITX-GP, a stripped-down version of the
MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in
HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.
Signed-off-by: Timur Tabi <timur@freescale.com>
There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
never does anything. This patch deletes it.
Signed-off-by: Timur Tabi <timur@freescale.com>
The patch solves the alignment problem of the local bus access windows to
render accessible the memory bank and PHY registers of UPC 1 (starting at
0xf801 0000). What we actually did was to adjust the sizes of the bus
access windows so that the base address alignment requirement would be met.
Signed-off-by: Chereji Marian <marian.chereji@freescale.com>
Signed-off-by: Gridish Shlomi <gridish@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
be used for busy-waiting since it strips the 'volatile' property from
the bd variable. gcc3 was working by pure luck.
This is a follow on patch to "Fix the UEC driver bug of QE"
The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
MPC834X class processors. Change the protections from CONFIG_MPC8349 to
CONFIG_MPC834X so they are more generic.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release, including the DDR changes.
I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board. Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.
Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)
Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.
Thanks,
Paul.
Put the version (and magic) after the HRCW. This puts it in a fixed
location in flash, not at the start of flash but as close as we can get.
Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.
CHANGELOG
*streamline the 83xx immr head file
Signed-off-by: Dave Liu <daveliu@freescale.com>
The patch prevents the GCC tool chain from striping useful code for
optimization. It will make UEC ethernet driver workable, Otherwise the
UEC will fail in tx when you are using gcc4.x. but the driver can work
when using gcc3.4.3.
CHANGELOG
*Prevent the GCC from striping code for optimization, Otherwise the UEC
will tx failed when you are using gcc4.x.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.
Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: Stefan Roese <sr@denx.de>
- fix logic error in image type handling
- make sure file system images (cramfs etc.) get stored in flash
with image header stripped so they can be mounted through MTD
Since the relocation fix is not included yet and we're not sure how
it will be added, this patch removes code that required relocation
to be fixed for now.
Signed-off-by: Stefan Roese <sr@denx.de>
As suggested by Grant Likely this patch enables the Xilinx SystemACE
driver to select 8 or 16bit mode upon startup.
Signed-off-by: Stefan Roese <sr@denx.de>
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
This patch enables the "new" get_dev() function for block devices
introduced by Grant Likely to be used on systems that still suffer
from the relocation problems (manual relocation neede because of
problems with linker script).
Hopefully we can resolve this relocation issue soon for all platform
so we don't need this additional code anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some problems when the Xilinx SystemACE driver
is used with 16bit access on an big endian platform (like the
AMCC Katmai).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:
- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.
This is in preparation for the 440 DDR2 controller support (440SP/e).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.
It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.
Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.
Signed-off-by: Stefan Roese <sr@denx.de>
Block device read/write is anonymous data; there is no need to use a
typed pointer. void * is fine. Also add a hook for block_read functions
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Register read/write does not need to be wrapped in a full function. The
patch replaces them with macros.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The code in this file is not a command; it is a device driver. Put it in
the correct place. There are zero functional changes in this patch, it
only moves the file.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch is in preparation of additional changes to the sysace driver.
May as well take this opportunity to fixup the inconsistent whitespace since
this file is about to undergo major changes anyway.
There are zero functional changes in this patch. It only cleans up the
the whitespace.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Printing a buffer is a darn useful thing. Move the buffer print code
into print_buffer() in lib_generic/
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Change the xilinx device drivers and board code to include config.h
instead of xparameters.h directly. config.h always includes the
correct xparameters file. This change reduces the posibility of
including the wrong file when adding a new xilinx board port
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Each of the filesystem drivers duplicate the get_dev routine. This change
merges them into a single function in part.c
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Update / extend Software Update Mechanism for MCC200 board:
- Add support for rootfs image added. The environment variables
"rootfs_st" and "rootfs_nd" can be used to override the default
values of the image start and end.
- Remove excessive key check code.
- Code cleanup.
Some boards that can have more than 768MBytes of SDRAM need to
set "initrd_high", so that the initrd can be accessed by the
Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Previously the strapping DCR/SDR was read to determine if the internal PCI
arbiter is enabled or not. This strapping bit can be overridden, so now
the current status is read from the correct DCR/SDR register.
Signed-off-by: Stefan Roese <sr@denx.de>
When PCI PNP is enabled the pci pnp configuration routine is called
which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some
problems with some PCI cards. For now disable the PCI PNP configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
The config file now handles the 2nd target, the Rainier (440GRx)
evaluation board better. Additionally the PPC input clock was
adjusted to match the correct value of 33.0 MHz.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
share one config file and all board specific files. This way we
don't have to maintain two different sets of files for nearly
identical boards.
Signed-off-by: Stefan Roese <sr@denx.de>
currently sectors 0-3. Sector 3 does not need to be protected, though
(U-boot occupies sectors 0-1 and the environment sector 2). This commit
fixes this, i.e., only sectors 0-2 are protected.
"mii device" results in "Unexpected exception"). Fixing this properly
requires some clean-up in the FEC drivers infrastructure for ColdFire, so
this commit disables MII commads for now.
The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
mpc7448hpc2 board.
Conflicts:
drivers/cfi_flash.c
The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
mpc7448hpc2 board.
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
The invocation of do_auto_update() is moved to the end of the
misc_init_r() function, after the flash mappings have been
initialized. Please find attached a patch that implements that
change.
Also correct the decoding of the keypad status. With this update, the
key that will trigger the update is Column 2, Row 2.
This patch fixes a problem with an incorrect setup for the refresh
timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c
Signed-off-by: Stefan Roese <sr@denx.de>
This update brings the ALPR board support to the newest version.
It also fixes a problem with the NAND driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Here the description from Brian Brelsford <Brian_Brelsford@dell.com>:
The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part
returns a 0x15. In the code fragment below bits [1:0] determine the
page size, it is ANDed via "(extid & 0x3)" then shifted out. The
next field is also ANDed with 0x3. However this is a one bit field
as defined in the Hynix and Samsung parts in the 4th ID byte that
determins the oobsize, not a two bit field. It works on Samsung as
bits[3:2] are 01. However for the Hynix there is a 11 in these two
bits, so the oob size gets messed up.
I checked the correct linux code and the suggested fix from Brian is
also available in the linux nand mtd driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This code will optimize the DDR2 controller setup on a board specific
basis.
Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
Signed-off-by: Stefan Roese <sr@denx.de>
- fix a typo in V38B config file
- move watchdog initialisation earlier in the boot process
- add "wdt=off" to default kernel command line (disables kernel watchdog)
multiplier table can not refect the real PLL clock behavior of these
processors. Please refer to the hardware specification for detailed
information of the corresponding processors.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The original search_one_table() function code can only processes the search
for the exception occurring in FLASH/ROM, because the exception and fixup
table usually locate in FLASH. If the exception address is also in
FLASH, it will be OK.
If the exception occurs in RAM, after the u-boot relocation, a
relocation offset should be added.
clean up the code in cpu/74xx_7xx/cpu.c
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The conflicts due to a new mpc7448 p3m7448 board is in the main tree.
Merge branch 'master' into hpc2
Conflicts:
MAKEALL
cpu/74xx_7xx/cpu.c
cpu/74xx_7xx/cpu_init.c
cpu/74xx_7xx/speed.c
(1) remove some C++ comments.
(2) remove trailing white space.
(3) remove trailing empty line.
(4) Indentation by table.
(5) remove {} in one line condition.
(6) add space before '(' in function call.
Remove some weird printf () output.
Add necessary comments.
Modified Makefile to support building in a separate directory.
The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
not the XLB frequency.
This patch depends on the previous patches for MPC52xx device tree support
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
quite similar and share the same board directory "prodrive/p3mx"
and the same config file "p3mx.h".
Signed-off-by: Stefan Roese <sr@denx.de>
In the bootvx command the load address was only read from the env
variable "loadaddr" and not optionally passed as paramter as described
in the help. This is fixed with this patch. The behaviour is now the
same as in the bootelf command.
Signed-off-by: Stefan Roese <sr@denx.de>
Fixed include/ppc440.c for UIC address Bug
Corrects bug affecting the addresses for the universal interrupt
controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the code and configuration necessary to boot with an
arch/powerpc Linux kernel.
Signed-off-by: Grant Likely <grant.likely@gmail.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Patch below corrects the setting of the zmiifer register, it was
overwritting the register rather than ORing the settings.
Signed-off-by: Neil Wilson <NWilson@airspan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The current NAND Bootloader setup forces the environment
variables to be in line with the bootloader. This change
enables the configuration to be made in the board include
file instead so that it can be individually enabled.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Two fixes for the nand_wait() function in
drivers/nand/nand_base.c:
1. Use correct timeouts. The original timeouts in Linux
source are 400ms and 20ms not 40s and 20s
2. Return correct error value in case of timeout. 0 is
interpreted as OK.
Signed-off-by: Rui Sousa <rui.sousa@laposte.net>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch allows an arch/ppc kernel to be booted by just passing 1 or 2
arguments to bootm. It removes the getenv("disable_of") test that used
to be used for this purpose.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Jon Loeliger <jdl@freescale.com>
and adapted board configs TQM5200 and yosemite accordingly. This commit
also makes the maximum number of root hub ports configurable
(CFG_USB_OHCI_MAX_ROOT_PORTS).
Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
* Adds support for AMD command set Top Boot flash geometry reversal
* Adds support for reading JEDEC Manufacturer ID and Device ID
* Adds support for displaying command set, manufacturer id and
device ids (flinfo)
* Makes flinfo output to be consistent when CFG_FLASH_EMPTY_INFO defined
* Removes outdated change history (refer to git log instead)
Signed-off-by: Tolunay Orkun <listmember@orkun.us>
Signed-off-by: Stefan Roese <sr@denx.de>
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: Timur Tabi <timur@freescale.com>
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
The 834x rev1.x silicon has one CPU5 errata.
The issue is when the data cache locked with
HID0[DLOCK], the dcbz instruction looks like no-op inst.
The right behavior of the data cache is when the data cache
Locked with HID0[DLOCK], the dcbz instruction allocates
new tags in cache.
The 834x rev3.0 and later and 8360 have not this bug inside.
So, when 834x rev3.0/8360 are working with ECC, the dcbz
instruction will corrupt the stack in cache, the processor will
checkstop reset.
However, the 834x rev1.x can work with ECC with these code,
because the sillicon has this cache bug. The dcbz will not
corrupt the stack in cache.
Really, it is the fault code running on fault sillicon.
This patch fix the incorrect dcbz operation. Instead of
CPU FP writing to initialise the ECC.
CHANGELOG:
* Fix the incorrect dcbz operation instead of CPU FP
writing to initialise the ECC memory. Otherwise, it
will corrupt the stack in cache, The processor will checkstop
reset.
Signed-off-by: Dave Liu <daveliu@freescale.com>
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
STDOUT_PATH configuration bits to mpc8349emds,
mpc8349itx, and mpc8360emds board code.
redo environment to use bootm with the fdtaddr
for booting ARCH=powerpc kernels by default,
and provide default fdtaddr values.
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006092142000015 "Add support for the MPC8349E-mITX 1/2"
2) DNX#2006092142000024 "Add support for the MPC8349E-mITX 2/2"
CHANGELOG:
* For the 8349E-mITX, fix some size values in pci_init_board(), enable
the clock for the 2nd USB board (Linux kernel will hang otherwise),
and fix the CONFIG_BOOTARGS macro.
Signed-off-by: Timur Tabi <timur@freescale.com>
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
Hello,
Here is a patch for a file that was accidentally left out of a previous
attempt.
It accompanies the patch with ticket DNX#2006090742000024
CHANGELOG:
Change PCI initialization to use new multi-bus I2C API.
regards,
Ben
Hello,
Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.
/*** Note: This patch replaces ticket DNX#2006083042000027 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
CHANGELOG:
Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.
regards,
Ben
Hello,
Attached is a patch providing support for multiple I2C buses at the
command level. The second part of the patch includes an implementation
for the MPC834x CPU and MPC8349EMDS board.
/*** Note: This patch replaces ticket DNX#2006083042000018 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Overview:
1. Include new 'i2c' command (based on USB implementation) using
CONFIG_I2C_CMD_TREE.
2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that
the commands to change bus number and speed are only available under the
new 'i2c' command mentioned in the first bullet.
3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form
of an array of bus-device pairs. Otherwise, it is an array of uchar.
CHANGELOG:
Added new 'i2c' master command for all I2C interaction. This is
conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for
setting I2C bus speed as well as changing the active bus if the board
has more than one (conditionally compiled with
CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses.
Updated README.
regards,
Ben
CHANGELOG:
* Errata DDR6, which affects all current MPC 834x processors, lists changes
required to maintain compatibility with various types of DDR memory. This
patch implements those changes.
Signed-off-by: Timur Tabi <timur@freescale.com>
CHANGELOG:
* On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
window registers, instead of using a hard-coded value of 8MB.
Signed-off-by: Timur Tabi <timur@freescale.com>
Unified TQM834x variable names with 83xx and consolidated macro
in preparation for the 8360 and other upcoming 83xx devices.
Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
Incorporated the common unified variable names and the changes in preparation
for releasing mpc8360 patches.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
defined
and the write crosses a block boundary. The pointer to the verification
buffer (bufstart) is not being updated to reflect the starting of the
new
block so the verification of the second block fails.
CHANGELOG:
* Fix NAND FLASH page verification across block boundaries
Added a phy initialization to adjust the RGMII RX and TX timing
Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode
Signed-off-by: Nick Spence <nick.spence@freescale.com>
The i2c Interface provides a master-only, serial interface that can be
used for initializing Tsi108/Tsi109 registers from an EEPROM after a
device reset.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
If there is no pci card, the tsi108/109 pci configure read will
cause a machine check exception to the processor. PCI error should
also be cleared after the read.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The following is a brief description of the Ethernet controller:
The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
Gigabit Ethernet ports,E0 and E1. It uses a single Management interface
to manage the two physical connection devices (PHYs). Each Ethernet port
has its own statistics monitor that tracks and reports key interface
statistics. Each port supports a 256-entry hash table for address
filtering. In addition, each port is bridged to the Switch Fabric
through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
Each Ethernet port also has a pair of internal Ethernet DMA channels to
support the transmit and receive data flows. The Ethernet DMA channels
use descriptors set up in memory, the memory map of the device, and
access via the Switch Fabric. The Ethernet Controller?s DMA arbiter
handles arbitration for the Switch Fabric. The Controller also
has a register businterface for register accesses and status monitor
control.
The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
modes. The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
The GMII and TBI modes are used to connect with Gigabit PMDs. Internal
data flows to and from the Ethernet Controller through the Switch Fabric.
Each Ethernet port uses its transmit and receive DMA channels to manage
data flows through buffer descriptors that are predefined by the
system (the descriptors can exist anywhere in the system memory map).
These descriptors are data structures that point to buffers filled
with data ready to transmit over Ethernet, or they point to empty
buffers ready to receive data from Ethernet.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The Tundra Semiconductor Corporation (Tundra) Tsi108 is a host bridge for
PowerPC processors that offers numerous system interconnect options for
embedded application designers. The Tsi108 can interconnect 60x or
MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit Ethernet,
and Flash. Provided the macro define for tsi108 chip.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
1. Add 7447A and 7448 processor support.
2. Add the following flags.
CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically
(such as by switch on board), this flag should be set.
CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot
relocates to RAM, this flag should be set.
CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the
system hang in exception, this flag should be set.
There is a design issue for tsi108/109 pci configure read. When pci scan
the slots, if there is no pci card, the tsi108/9 will cause a machine
check exception for mpc7448 processor.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* remove warnings when compiling ethaddr.c
* adjust linker script (fixes a crash resulting from incorrect
definition of __u_boot_cmd_start)
- Some MarelV38B code cleanup.
MPC5XXX_WU_GPIO_DATA macro to MPC5XXX_WU_GPIO_DATA_O (per MPC5200 User's
Manual). Replace the uses of MPC5XXX_WU_GPIO_DATA with
MPC5XXX_WU_GPIO_DATA_O for affected boards.
- Add defintions for some MPC5XXX GPIO pins.
Use MACH_TYPE_NETSTAR and MACH_TYPE_VOICEBLUE defines instead of
numbers in code.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
chpart, nboot and NAND subsystem related commands now accept also partition
name to specify offset.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Make sure the string passed as variable name does not contain a '='
character. This not only prevents the common error or typing
"setenv foo=bar" instead of "setenv foo bar", but (more importantly)
also closes a backdoor which allowed to delete write-protected
environment variables, for example by using "setenv ethaddr=".
When passing the -g option to gcc, gcc automatically selects a
suitable --g<format> option to pass on to the assembler.
Thus, there's no point in forcing a specific debug option on the
assembler using the -Wa mechanism.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add atstk1002_config target to Makefile and move the AVR32 section
down below Blackfin so that it doesn't end up in the middle of
MIPS.
Drop the autogenerated linker script thing for now. Will have to
revisit how to handle chips with different flash and RAM layout
later.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
If a Multi-Image file contains a third image we try to use it as a
device tree. The device tree image is assumed to be uncompressed in the
image file. We automatically allocate space for the device tree in memory
and provide an 8k pad to allow more than a reasonable amount of growth.
Additionally, a device tree that was contained in flash will now automatically
get copied to system memory as part of boot. Previously an error was
reported if one tried to boot a device tree that was in flash.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the ATSTK1000 with the ATSTK1002 CPU
daughterboard.
ATSTK1000 is a full-featured development board for AT32AP CPUs. It
has two ethernet ports, a high quality QVGA LCD panel, a loudspeaker,
and connectors for USART, PS/2, VGA, USB, MMC/SD cards and
CompactFlash cards. For more information, please see this page:
http://www.atmel.com/dyn/products/tools.asp?family_id=682
The ATSTK1002 is a daughterboard for the ATSTK1000 supporting the
AT32AP7000 chip.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 06 Sep 2006
This is a first attempt at creating a common serial driver for Atmel
chips. For now, it supports the AT32AP7000 AVR32 chip, but it should
be possible to support AT91RM9200 and other ARM-based chips with some
minor modifications.
There's nothing fundamentally AVR32-specific in this driver, but it
does use some features which are currently only defined for the
AT32AP CPU port:
* pm_get_clock_freq: Obtain the clock frequency of a given domain
* gd->console_uart: A "struct device" containing information about
register mappings, gpio resources and clocks associated with the
UART device.
For more information about these features, please see the "AT32AP
CPU" patch.
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.
The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200
This patch adds common infrastructure code for the Atmel AVR32
architecture. See doc/README.AVR32 for details.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 30 Aug 2006
In config.mk, -Wa,-gstabs is unconditionally appended to AFLAGS no
matter what the target's preferred debugging format is. This patch
simply replaces -gstabs with -g, so that the default debugging format
for the architecture is used.
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
conditional expressions instead.
Use consistent return code 0/-1 for good/bad indicators.
Include one fewer file if the driver isn't used at all.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
When CONFIG_OF_FLAG_TREE is set, the compiler complains that 'len' in
do_bootm_linux() may be uninitialized. There is no possibility in the
current code that len will get used uninitialized, but this fix follows
the existing convention of setting both len and data to zero at the same
time.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
- JFFS2 related commands implemented in mtd-utils style
- Support for bad blocks
- Bad block testing commands
- NAND lock commands
Please take a look at doc/README.nand for more details
Patch by Guido Classen, 10 Oct 2006
- Map in a additional chip selects CS4 and CS5.
- Modify the port configration, configure six UARTs and no PCI,
ATA and USB.
- Add custom flash driver to handle specific byte swapping
* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
in other systems
Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
Improved the memory DIMM detection for the Yucca 440SPe board for
the case where a memory DIMM is falsely detected as present.
This issue is seen on some AMCC Yucca 440SPe validation boards if
only one 512MB memory DIMM is installed, i.e. DIMM slot 0 is
populated and DIMM slot 1 is empty. In this case, U-Boot does
not correctly detect that there is only one DIMM memory module
installed and will falsely detect two DIMM memory modules are
present and therefore U-Boot will not calculate the correct amount
of total memory and u-boot will not booting up.
Patch by Adam Graham, 24 Aug 2006
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
- make highboot configurations use environment at high end, too,
to avoid flash fragmentation
- always use redundand environment
- don't enable video code for modules without graphics controller
- provide useful (though different) mtdparts settings
- get rid of CONFIG_CS_AUTOCONF which was always set anyway
* Extend mkconfig tool to print more useful target name
Hint: the CPLD on the TQM5200 must be programmed with a software
version supporting the high boot option! The new TQM5200S is
already supporting this option. On the TQM5200 this option will be
supported in configurations with MPC5200 rev B processors.
To actually "high boot", set jumper X30 on the STK52xx.
Patch by Martin Krause, 12 Jul 2006
- Support for TQM5200S (short version without graphic controller)
- Support for modules with 'N' type S29GL128N Spansion flashes
(requires changes to flash layout)
- Support for MPC5200B cpu (mostly support for second SDRAM bank)
The PS/2 keyobard driver for the TQM85xx modules only supports the
internal DUART of the MPC85xx CPU. Since the MPC8560 doesn't
include a DUART, the TQM8560 modules can't be used with the PS/2
keyboard controller on the STK85xx board.
The PS/2 keyboard driver should work with the modules TQM8540,
TQM8541 and TQM8555, but it only has been tested on a TQM8540, yet.
Make sure the PS/2 controller on the STK85xx is programmed. Jumper
settings: X66 1-2, 9-10; X61 2-3
Patch by Martin Krause, 21 Jun 2006
During an automatic update via USB stick, U-Boot searches for
images with the name "firmware.img" and "kernel.img". This names
are now changed to "firmw_01.img" and "kernl_01.img". This is done,
to prevent updates of new boards (with the new macronics "c" step
flashes) with old, incompatible firmware or kernel versions.
Patch by Martin Krause, 21 Jun 2006
- increase CFG_FLASH_ERASE_TOUT from 2 to 15 seconds
- use CFG_FLASH_WRITE_TOUT for programming instead of CFG_FLASH_ERASE_TOUT
- remove "Unlock Bypass" mode, because macronix flashes do not support
this mode officially
- fix flash reset command from 0x00FF to 0x00F0. 0x00FF is only specified
for Intel compatible flashes, not for AMD compatible.
Patch by Martin Krause, 15 Feb 2006
The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
integrated in a little aluminium case.
Patch by Martin Krause, 8 Jun 2006
Some code cleanup
Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
All MII configuration is done via FEC1 registers. But MII_SPEED was
configured according to FEC used. So if only FEC2 was used, this caused
the real MII_SPEED register in FEC1 to stay uninitalised, what lead
to "mii_send STUCK!" messages. Fix: always configure MII_SPEED on FEC1
only.
Notes:
- Board-dependend code for RPXLITE and RPXCLASSIC-based boards
placed to the drivers/rpx_pmcia.c file to avoid duplication.
Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
- drivers/i82365.c has been split into two parts located at
board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
the only boards using CONFIG_82365).
- Changes were tested for clean build and *very* *few* boards.
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Patch by Martin Krause, 8 Jun 2006
This patch supports two serial consoles on boards with
a MPC5xxx CPU. The console can be switched at runtime
by setting stdin, stdout and stderr to the desired serial
interface (serial0 or serial1). The PSCs to be used as
console port are definded by CONFIG_PSC_CONSOLE
and CONFIG_PSC_CONSOLE2.
See README.serial_multi for details.
If the bus is blocked because of a previously interrupted
transfer, up to eleven clocks are generated on the I2CSCL
line to complete the transfer and to free the bus.
With this fix pin I2CSCL (PG6) is really configured as GPIO
so the clock pulses are really generated.
Patch by Martin Krause, 04 Apr 2006
Patch by Martin Krause, 07 Nov 2005
Tested on a STK85XX baseboard. Make sure the PS/2 controller
has been programmed. Jumper Settings: X66 1-2, 9-10; X61 2-3
Patch by Martin Krause, 08 Nov 2005
In tsc2000_read_channel() the delay after setting the multiplexer
to a temperature channel is increased from 1,5 ms to 10 ms. This
is to allow the multiplexer inputs to stabilize after huge steps
of the input signal level.
Make the automatic CS configuration the default.
The dedicated configurations CONFIG_TQM5200_AA, CONFIG_TQM5200_AB
and CONFIG_TQM5200_AC are removed.
"TQM5200_config" is now the default for STK52XX.200 base boards.
On a STK52XX.100 base board "TQM5200_STK100_config" must be used.
Patch by Martin Krause, 07 Nov 2005
The environment variable "ver" is now set before
do_auto_update() is called, so that "ver" can be used
in USB update scripts.
Patch by Martin Krause, 27 Oct 2005
- Add support for mpc8xx USB device.
- Add support for Common Device Class - Abstract Control Model USB console.
- Add support for flow control in USB slave devices.
- Add support for switching between gserial and cdc_acm using environment.
- Minor changes to usbdcore_omap1510.c usbdcore_omap1510.h
- Update usbcore slightly to ease host enumeration.
- Fix non-portable endian problems in usbdcore and usbdcore_ep0.
- Add AdderUSB_config as a defconfig to enable usage of the USB console
by default with the Adder87x U-Boot port.
Patches by Bryan O'Donoghue <bodonoghue@codehermit.ie>, 29 May 2006
-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt, 08 Jun 2006
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
Patch by Scott McNutt, 08 Jun 2006
Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
We use the "automatic" mode that was used for the MPC8266ADS and
MPC8272 boards. Eventually this should be used on all boards?]
Patch by Wolfgang Grandegger, 17 Jan 2006
"reset altbank" will reset another bank WITHOUT watch dog timer enabled
"reset altbank wd" will reset another bank WITH watch dog enabled
"diswd" will disable watch dog after u-boot boots up successfully
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
- Add IXP4xx NPE ethernet MAC support
- Add support for Intel IXDPG425 board
- Add support for Prodrive PDNB3 board
- Add IRQ support
Patch by Stefan Roese, 23 May 2006
[This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
sufferes from licensing issues. Blame Intel.]
Problems have been seen in the linux kernel's smc91x network driver
due to improper bus timings. The latest 2.6 OMAP kernels currently
have a workaround, but this fix belongs in u-boot.
Patch by Kevin Hilman, 13 Oct 2005
- Fix OMAP support that omap5912osk compiles in current source tree
- Update with code from "http://omap.spectrumdigital.com/osk5912"
to fix problems with DDR initialization
- Fix timer setup
- Use CFI flash driver and support complete 32MB of onboard flash
- Add "print_cpuinfo()" and "checkboard()" functions to display
CPU (with frequency) and Board infos
Patch by Stefan Roese, 10 May 2006
Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
- Removed MPC8349ADS port
- Added PCI support to MPC8349ADS
- reworked memory map to allow mapping of all regions with BATs
Patch by Kumar Gala 20 Apr 2006
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Patch from Scott McNutt 11, Aug 2005
-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt 11, Aug 2005
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
relocate ichache_State to ram
u-boot can run from internal flash
Add EB+MCF-EV123 board support.
Add m68k Boards to MAKEALL
Patch from Jens Scharsig, 08 Aug 2005
- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
- fix some compiler/parser error, if using m68k tool chain
- optical fix for protect on/off all messages, if using more
then one bank
Patch by Jens Scharsig, 28 July 2005
Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
CFG_BOOTM_LEN to adjust this setting.
As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
uImages was restricted to 4MBytes. This default size is now
increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
in the board config file.
Patch by Stefan Roese, 13 Mar 2006
- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:
- Use correct flash sector size
- Use correct memory test end address
- Add support for bzip2 compression
- Various small fixes
Patch by Yuli Barcohen, 05 Jun 2005
- Fix SDRAM timing on both local bus and 60x bus
- Add support for second flash bank (SIMM)
- Change boot flash base
Patch by Yuli Barcohen, 05 Jun 2005
* For READ_STATUS and READID commands always 8 bytes need to be read from
NDDB. Otherwise they stay there and get send to flash as the first data
word when writing.
* In nand_base.c the oob variable is not reset so this->oob_buf is
overwritten what eventually screws up the bad block descriptor table.
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.
* Debug message can be turned on and off.
* Waiting for events now times out.
* Implemented RESET command.
* Added appropriate nand_bbt_descriptor and nand_oobinfo.
Remaining Problems:
* Read Status still behaves weird an returns invalid stuff sometimes.
* ECC Placement does not respect our scheme in nand_oobinfo.
* Add env-variable "unlock" to handle initial state of sectors
(locked/unlocked).
Only the U-Boot image and it's environment is protected,
all other sectors are unprotected (unlocked) if flash
hardware protection is used (CFG_FLASH_PROTECTION) and
the environment variable "unlock" is set to "yes".
Patch by Stefan Roese, 28 Feb 2006
* Update drivers/cfi_flash.c:
- find_sector() called in both versions of flash_write_cfiword()
Patch by Peter Pearse, 27th Feb 2006
* CFI support for a x8/x16 AMD/Spansion flash configured in x8 mode
Patch by Jose Maria Lopez, 16 Jan 2006
* Add support for AMD/Spansion Flashes in flash_write_cfibuffer
Patch by Alex Bastos and Thomas Schaefer, 2005-08-29
* Changes/fixes for drivers/cfi_flash.c:
We *should* check if there are any error bits if the previous call
returned ERR_OK (Otherwise we will have output an error message in
flash_status_check() already.) The original code would only check for
error bits if flash_status_check() returns ERR_TIMEOUT.
Patch by Marcus Hall, 23 Aug 2005
* Changes/fixes for drivers/cfi_flash.c:
- Add CFG_FLASH_PROTECT_CLEAR on drivers/cfi_flash.c
- Prohibit buffer write when buffer_size is 1 on drivers/cfi_flash.c
Patch by Sangmoon Kim, 19 Aug 2005
* Fixes for drivers/cfi_flash.c:
- Fix wrong timeout value usage in flash_status_check()
- Round write_tout up when converting to msec in flash_get_size()
- Remove clearing flash status at the end of flash_write_cfibuffer()
which sets Intel 28F640J3 flash back to command mode on CSB472
Patch by Tolunay Orkun, 02 July 2005
As done in the linux kernel, the U-Boot version (U_BOOT_VERSION)
of all unreleased (untagged) U-Boot images will be automatically
extended upon compiletime with a part of the GIT commit ID and
possibly with "dirty" if uncommited changes are detected.
Here an example for the resulting version:
"U-Boot 1.1.4-g3457ac18-dirty"
The version is now maintained in the toplevel Makefile and the
version headers are autogenerated.
Patch by Stefan Roese, 9 Feb 2006
* lots of bugfixes in the assembler code
* reverted hardware.h back to original
* enabled hardware DRAM calibration
* GCC-4 fix: modified GLOBAL_DATA_POINTER macro
done so far:
* created zylonite board dir (based on lubbock)
* extended some - but not all pxa sources and headers for Intel
Monahans support (CONFIG_CPU_MONAHANS)
* created Makefile zylonite target + MAKEALL entry
* added some debug nonsense, remove later, grep for mk@tbd
Status: compiles (eldk-4.0), and can be started with BDI, but runs forever
and doesn't halt at breakpoints. Hmmm...
To match the U-Boot user interface on ARM platforms to the U-Boot
standard (as on PPC platforms), some messages with debug character
are removed from the default U-Boot build.
Enable DEBUG for lib_arm/board.c to enable debug messages.
New CONFIG_DISPLAY_CPUINFO and CONFIG_DISPLAY_BOARDINFO options.
Patch by Stefan Roese, 24 Jan 2006
OF_STDOUT_PATH specifies the path to the device the kernel can use
for console output
OF_SOC specifies the proper name of the SOC node if one exists.
Patch by Kumar Gala 11 Jan 2006
CONFIG_OF_HAS_BD_T will put a copy of the bd_t
into the resulting flat device tree.
CONFIG_OF_HAS_UBOOT_ENV will copy the environment
variables from u-boot into the flat device tree
Patch by Kumar Gala 11 Jan 2006
If a host controller sets up a region as prefetchable and
a device's BAR denotes it as prefetchable, allocate the
BAR into the prefetch region.
If a BAR is prefetchable and no prefetchable region has
been setup by the controller we fall back to allocating
the BAR into the normally memory region.
Patch by Kumar Gala 11 Jan 2006
- Changed GPIO setup to enable another address line in order to
address 64M of FLASH.
- Added function sdram_tr1_set to auto calculate the tr1 value for
the DDR.
Patch by Steven Blakeslee, 12 Dec 2005
- Support for TQM8541/8555 boards added.
- Complete rework of TQM8540/8560 support.
- Common TQM85xx code now supports all current TQM85xx platforms
(TQM8540/8541/8555/8560).
- DDR SDRAM size detection added.
- CAS latency default values can be overwritten by setting "serial#"
to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
If problems are detected with this non default CAS latency,
the defualt values will be used instead.
- FLASH size detection added.
- Moved FCC ethernet driver initialization behind TSEC driver init
-> TSEC is first device.
Patch by Stefan Roese, 30 Nov 2005
On PPC44x platforms, the startup message generated in "cpu.c" only
comprised the ppc type and revision but not additional informations
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.
Patch by Stefan Roese, 27 Nov 2005
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
Patch by Anders Larsen, 07 Oct 2005
The Atmel errata #11 states that the transfer buffer descriptor
table must be aligned on a 16-word boundary. As it turned out, this
is insufficient - it seems the table must be aligned on a boundary
at least as large as the table itself (in Linux this is not an
issue - the table is aligned on a PAGE_SIZE (4096) boundary).
Correct addessing errors in platform files.
Split off common core module data from Integrator header files to
include/armcoremodule.h.
Patch by Peter Pearse, 04 Oct 2005
- Resolve the FIXME with respect to saving the u-boot environment.
- Make the default load address land in real memory.
- Fix lan91c96 SMC_{in,out}{b,w,l}() macros
Patch by David Brownell, 10 Mar 2005
- fix for ES2 differences.
- switch to using the cfi_flash driver.
- fix SRAM build address.
- fix for GP device operation.
- unlock SRAM for GP devices.
- display more device information.
- fix potential deadlock in omap24xx_i2c driver.
- fix DLL load values to match dpllout*1 operation.
- fix 2nd chip select init for combo DDR device.
- add support for CFI Intel 28F256L18 on H4 board.
Patch by Richard Woodruff, 03 Mar 2005
Use drivers/cfi_flash.c instead of private flash driver;
Remove hardcoded personalized settings from omap5912osk.h;
Fix spacing with (RO) marks in 'flinfo' output.
Patch by Michael Bendzick, 14 Jan 2005
The virtex2 FPGA download code watches for init going active during
a download of config data as an error condition. init also goes
active after a configuration is finished in concert with the done
signal. So far, the code does not check for done active until all
of the configuration data is sent. If configuration data has a few
extra pad bytes at the end, this would cause an error message even
though the download had suceeded.
NOTE: virtex2 slave serial and spartan2 versions may still have the
same problem.
Patch by Andrew Dyer, 12 Jan 2005
Fix "WARNING: flash_make_cmd: unsuppported LittleEndian mode"
message when probing for nonexistent flash in little endian mode.
As a side effect more efficient and smaller code is generated,
which is always a Good Thing (TM).
Patch by Ladislav Michl, 24 Sep 2005
Use the approved environment variable names. Added "tftpdstp" to
allow ports other than 69 per Tolunay Orkun's recommendation.
Patch by Jerry Van Baren, 12 Jan 2005
Add support for gzip compressed bmp's (CONFIG_VIDEO_BMP_GZIP).
Add support for eeprom write-enable (CFG_EEPROM_WREN).
Patch by Stefan Roese, 22 Sep 2005
The global data pointer, stored in r29 before relocation to RAM, was
not initialized to a correct value. This happened because the pointer
declaration was done locally in the scope of the board_init_f()
function. What follows is a cite from gcc.info, 5.37, "Variables in
Specified Registers":
...
The compiler's data flow analysis is capable of determining where
the specified registers contain live values, and where they are
available for other uses. Stores into local register variables
may be deleted when they appear to be dead according to dataflow
analysis. References to local register variables may be deleted
or moved or simplified.
...
Moving the global data declaration to global scope solved the
problem.
- make watchdog driver work on systems with an IPB clock
frequency of 133 MHz (watchdog expired to fast there).
- now all three watchdog chain entries could be used.
- fix some typos.
Patch by Martin Krause, 23 Jun 2005
so we can use them to, e.g., check the existence of a file with
"if ls foo; then this; else that; fi" in the hush shell
Patch by Andreas Engel, 16 August 2005
Second serial port on 440GX now defined as a system device.
Add 'Short Etch' code for Cicada PHY within 440gx_enet.c
Patch by Travis B. Sawyer, 12 Jul 2005
Check return value of malloc in 440gx_enet.c
Patch by Travis B. Sawyer, 18 Jul 2005
Incorrect gcc options (big endian -BE switch) were used for
dbau1550_el which is a little endian build; also get rid of reference
to non-existant cpu/mips/little/liblittle.a library
Old, obsolete and duplicated code was cleaned up and replace by the
new partitioning method. There are two possible approaches now:
* define a single, static partition
* use mtdparts command line option and dynamic partitioning
Default is static partitioning.
The code is provided for, and was tested on, the Yukon/Alaska
and PM520 boards only.
A bug in flash_real_protect() for the Yukon board was fixed by adding
a function that tells if two banks are on one flash chip.
This fixes a problem of displaying bogus voltages when the voltages
are so low that the I2C devices start failing while the rest of the
system keeps running.
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
- Convert the CPM2 based functionality to use new CONFIG_CPM2
option rather than a myriad of CONFIG_MPC8560-like variants.
Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
Eliminates the CONFIG_MPC8560 option entirely. Distributes the
new CONFIG_CPM2 option to each 8260 board.
A new, Windows compatible init sequence was also backported from Linux 2.6,
but disabled with #undef NEW_INIT_SEQ as it wouldn't change the behaviour
of the memopry sticks we tested. Maybe it's not relevant for mass storage
devices. For recerence, see file common/usb.c, function usb_new_device(),
section #ifdef NEW_INIT_SEQ.
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