Unsupported voltage on voltage switch is not an error, do not
print error message in such a case. This happens e.g. if the
eMMC is already in 1V8 mode or when testing 1V2 mode operation
on systems which only do 3V3/1V8 switching.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The 3V3/1V8 switching could never have worked on any of the iMXes
ever since 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200"),
because that commit uses priv->vqmmc_dev when switching voltages on
mode switch, while local vqmmc_dev in probe to store the regulator
pointer. Those are two different variables with the same name. So
the priv->vqmmc_dev was always NULL and thus voltage switch between
modes never really suceeded.
Fix this by assigning priv->vqmmc_dev with value of the vqmmc_dev
in probe.
Fixes: 51313b49f2 ("mmc: fsl_esdhc: support SDR104 and HS200")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- Rename DT compatible name
- Remove uneccessary if-statement to support 8-bit buswidth
- Remove redundant error msg
- Use symbolic constants in switch statement
Signed-off-by: Arthur Li <arthur.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Peng Fan <peng.fan@nxp.com>
CC: Jaehoon Chung <jh80.chung@samsung.com>
CC: Tom Rini <trini@konsulko.com>
When eSDHC operates at 3.3v, damage can accumulate in an internal
level shifter at a higher than expected rate. The faster the interface
runs, the more damage accumulates. This issue now is found on LX2160A
eSDHC1 for only SD card.
The hardware workaround is recommended to use an on-board level shifter
that is 1.8v on SoC side and 3.3v on SD card side.
For boards without hardware workaround, this option could be enabled,
ensuring 1.8v IO voltage and disabling eSDHC if no card.
This option assumes no hotplug, and u-boot has to make all the way to
to linux to use 1.8v UHS-I speed mode if has card.
If you do not want the workaround for better user experience, of course
you can choose to not select it running eSDHC in unsafe mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Update the firmware to improve compatibility for none-intel USB
host controller. The more information is as following.
The device has auto-installed driver feature - via switch CD-ROM/NIC
mode. But in some corner cases, it would switch to CD-ROM unexpected.
This issue results in Lan Function Disabled.
While USB PHY transits to P3 from P0 due to the absent of transmitter
control, it would issues undefined signal to its link partner.
Some Down Stream Port misidentify the undefined signal as wakeup
signal. So the link state will not keep in suspend even the system
is idle.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Now all boards which are using davinci SPI driver
have moved to SPL_DM so drop the unneeded non-dm code.
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
atmel spi driver now accessible only when DM_SPI enabled.
So, remove nondm code.
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
- Deadline for DM migration already passed by months.
- Sent couple of zap patches and
- No response on dm conversation
hence removed the driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Order the macros, private structures and simple functions
in a proper way to have more code readability.
No functionality changed.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Deadline for DM migration already passed by months
and no response on full dm conversation hence removed
the nondm code.
Note: Look like there is no user for nondm code
for this driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add the missing Kconfig dependency and let VIRTIO_RNG default to yes.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Debug console is the part of serial driver in the same file. It means to be
able to enable debug console you also need to enable driver itself.
That's why add all dependecies and list only debug consoles which are
enabled based on driver selection to avoid compilation error when user
asks for certain debug console but driver is not enable for it.
Error:
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc':
/home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch'
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts':
/home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch'
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P]
Signed-off-by: Tom Rini <trini@konsulko.com>
The symbol "CONFIG_ARM_DCC" is used to control building
drivers/serial/arm_dcc.c. Provide a simple Kconfig entry for this.
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.
Fixes: 9a1d6af55e ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Allow the MDIO devices to be probed based on the device tree.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
U-Boot ethernet works with FSBL flow where releasing ethernet clock
reset is part of FSBL itself but with the SPL, We need to release
ethernet clock reset explicitly for U-Boot proper. With this change
Release ethernet clock reset code in FSBL might not be needed or
unaffected.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Release ddr clock reset once clock is initialized
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Added clock enable and disable functions in prci ops
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Added a misc driver to handle OTP memory in SiFive SoCs.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
A compilation error appears when QE is compiled with DM_ETH
enabled:
drivers/qe/uec.c: In function 'init_phy':
drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device'
uec = (uec_private_t *)dev->priv;
^~
drivers/qe/uec.c: In function 'uec_initialize':
drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device'
dev = (struct eth_device *)malloc(sizeof(struct eth_device));
^~~~~~
The patch disables CONFIG_QE when CONFIG_DM_ETH is set.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This config option depends on EXT4 support.
If Ext4 write capability is not selected, it generate write error messages
and is unable to maintain boot counter.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
This is defined in the asm/cache.h header file. Update this header file to
include it so it gets the same value consistently across U-Boot.
This fixes 'usb host' on omapl138_lcdk.
Fixes: 90526e9fba ("common: Drop net.h from common header")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present this logic does not work on link and samus, since their SPI
controller is not a PCI device, but a child of the PCH.
Unfortunately, fixing this involves a lot of extra logic. Still, this was
requested in the review of the fix-up patch, so here it is.
Fixes: 92842147c3 ("spi: ich: Add support for get_mmap() method")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.
This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
dm_spi_slave_platdata used in sf_probe for printing
plat->cs value and there is no relevant usage apart
from this.
We have enough debug messages available in SPI and SF
areas so drop this plat get and associated bug statement.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Currently spi-nor code is assigning _write ops for SST
and other flashes separately.
Just call the sst_write from generic write ops and return
if SST flash found, this way it avoids the confusion of
multiple write ops assignment during the scan and makes
it more feasible for code readability.
No functionality changes.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The get_sw_write_prot API is used to get the write-protected
bits of flash by reading the status register and other wards
it's API for reading register bits.
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
2) Technically there is no real hardware user for this API to
use in the source tree.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
Considering all these points, this patch drops the get_sw_write_prot
and associated code bases.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
sh_spi driver is deprecated, no active updates and
no board user, hence dropped the same.
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
