sunxi: video: Force h/vsync active high when using ext. vga dac on some boards
On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an unstable image when active low v or hsync is used. The problem seems to be specific to the OLinuxIno A13 (normal & micro) boards. I've just looked up the schematics and they use an opendrain driver for the vga sync lines, and with sync pulses it is the logical high->low edge of the pulse which counts for the timing, which with an active low sync is being driven by the pull-up, and that simply seems to not drive it hard enough to get a stable image. So force v and hsync active high on these boards. independent of what the modeline says. This fixes the unstable image. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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@ -185,6 +185,16 @@ config VIDEO_VGA_VIA_LCD
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LCD interface driving a VGA connector, such as found on the
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Olimex A13 boards.
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config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
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boolean "Force sync active high for VGA via LCD controller support"
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depends on VIDEO_VGA_VIA_LCD
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default n
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---help---
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Say Y here if you've a board which uses opendrain drivers for the vga
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hsync and vsync signals. Opendrain drivers cannot generate steep enough
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positive edges for a stable video output, so on boards with opendrain
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drivers the sync signals must always be active high.
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config VIDEO_VGA_EXTERNAL_DAC_EN
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string "LCD panel power enable pin"
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depends on VIDEO_VGA_VIA_LCD
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@ -4,6 +4,7 @@ CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb"
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CONFIG_USB1_VBUS_PIN="PG11"
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CONFIG_VIDEO_HDMI=n
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CONFIG_VIDEO_VGA_VIA_LCD=y
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CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
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# For use with the Olimex 7" LCD module, adjust timings for other displays
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# Set video-mode=sunxi:800x600-24@60,monitor=lcd in the env. to enable
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CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
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@ -4,6 +4,7 @@ CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb"
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CONFIG_USB1_VBUS_PIN="PG11"
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CONFIG_VIDEO_HDMI=n
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CONFIG_VIDEO_VGA_VIA_LCD=y
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CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
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# For use with the Olimex 7" LCD module, adjust timings for other displays
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# Set video-mode=sunxi:800x600-24@60,monitor=lcd in the env. to enable
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CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
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@ -645,7 +645,8 @@ static int sunxi_lcdc_get_clk_delay(const struct ctfb_res_modes *mode)
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return (delay > 30) ? 30 : delay;
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}
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static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode)
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static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
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bool for_ext_vga_dac)
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{
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struct sunxi_lcdc_reg * const lcdc =
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(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
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@ -719,6 +720,11 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode)
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val |= SUNXI_LCDC_TCON_HSYNC_MASK;
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if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
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val |= SUNXI_LCDC_TCON_VSYNC_MASK;
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#ifdef CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
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if (for_ext_vga_dac)
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val = 0;
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#endif
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writel(val, &lcdc->tcon0_io_polarity);
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writel(0, &lcdc->tcon0_io_tristate);
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@ -1015,7 +1021,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
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hitachi_tx18d42vm_init();
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}
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sunxi_composer_mode_set(mode, address);
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sunxi_lcdc_tcon0_mode_set(mode);
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sunxi_lcdc_tcon0_mode_set(mode, false);
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sunxi_composer_enable();
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sunxi_lcdc_enable();
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#ifdef CONFIG_VIDEO_LCD_SSD2828
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@ -1033,7 +1039,7 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
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sunxi_vga_enable();
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#elif defined CONFIG_VIDEO_VGA_VIA_LCD
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sunxi_composer_mode_set(mode, address);
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sunxi_lcdc_tcon0_mode_set(mode);
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sunxi_lcdc_tcon0_mode_set(mode, true);
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sunxi_composer_enable();
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sunxi_lcdc_enable();
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sunxi_vga_external_dac_enable();
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