IDE: - make ide_inb () and ide_outb () "weak", so boards can

define there own I/O functions.
          (Needed for the pcs440ep board).
        - The default I/O Functions are again 8 Bit accesses.
        - Added CONFIG_CMD_IDE for the pcs440ep Board.

Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher 2007-08-28 17:39:14 +02:00
parent 3e66c07800
commit f98984cb19
5 changed files with 49 additions and 44 deletions

View File

@ -30,6 +30,7 @@
#include <spd_sdram.h>
#include <status_led.h>
#include <sha1.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@ -867,6 +868,29 @@ U_BOOT_CMD(
);
#endif
#if defined (CONFIG_CMD_IDE)
/* These addresses need to be shifted one place to the left
* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
* These values are shifted
*/
extern ulong *ide_bus_offset;
void inline ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+port));
out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
}
unsigned char inline ide_inb(int dev, int port)
{
uchar val;
val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+port), val);
return (val);
}
#endif
#ifdef CONFIG_IDE_PREINIT
int ide_preinit (void)
{

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@ -31,6 +31,7 @@
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
# include <pcmcia.h>
@ -128,8 +129,6 @@ ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
};
#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
#ifndef CONFIG_AMIGAONEG3SE
static int ide_bus_ok[CFG_IDE_MAXBUS];
#else
@ -172,8 +171,8 @@ static uchar ide_wait (int dev, ulong t);
#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
static void __inline__ ide_outb(int dev, int port, unsigned char val);
static unsigned char __inline__ ide_inb(int dev, int port);
void inline ide_outb(int dev, int port, unsigned char val);
unsigned char inline ide_inb(int dev, int port);
static void input_data(int dev, ulong *sect_buf, int words);
static void output_data(int dev, ulong *sect_buf, int words);
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
@ -805,45 +804,27 @@ set_pcmcia_timing (int pmode)
/* ------------------------------------------------------------------------- */
#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static void __inline__
ide_outb(int dev, int port, unsigned char val)
void inline
__ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+port));
/* Ensure I/O operations complete */
EIEIO;
*((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
}
#else /* ! __PPC__ */
static void __inline__
ide_outb(int dev, int port, unsigned char val)
{
outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
}
#endif /* __PPC__ */
void inline ide_outb (int dev, int port, unsigned char val)
__attribute__((weak, alias("__ide_outb")));
#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static unsigned char __inline__
ide_inb(int dev, int port)
unsigned char inline
__ide_inb(int dev, int port)
{
uchar val;
/* Ensure I/O operations complete */
EIEIO;
val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+port), val);
return (val);
dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
return val;
}
#else /* ! __PPC__ */
static unsigned char __inline__
ide_inb(int dev, int port)
{
return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
}
#endif /* __PPC__ */
unsigned char inline ide_inb(int dev, int port)
__attribute__((weak, alias("__ide_inb")));
#ifdef __PPC__
# ifdef CONFIG_AMIGAONEG3SE

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@ -13,6 +13,9 @@
#define SIO_CONFIG_RA 0x398
#define SIO_CONFIG_RD 0x399
#ifndef _IO_BASE
#define _IO_BASE 0
#endif
#define readb(addr) in_8((volatile u8 *)(addr))
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))

View File

@ -266,7 +266,10 @@
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
@ -274,12 +277,10 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_REISER
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_USB
#define CONFIG_SUPPORT_VFAT
/*
@ -488,10 +489,4 @@
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET (0x0000)
/* These addresses need to be shifted one place to the left
* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
* These values are shifted
*/
#define CFG_ATA_PORT_ADDR(port) ((port) << 1)
#endif /* __CONFIG_H */

View File

@ -26,6 +26,8 @@
#define IDE_BUS(dev) (dev >> 1)
#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
#ifdef CONFIG_IDE_LED
/*