LPC2292 SODIMM port coding style cleanup.
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CHANGELOG
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CHANGELOG
@ -1,3 +1,46 @@
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commit 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3
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Author: Gary Jennejohn <garyj@pollux.denx.de>
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Date: Wed Jan 24 12:16:56 2007 +0100
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Add port for the lpc2292sodimm evaluation board from EmbeddedArtists
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commit 2daf046ba627f85f44195815778140039636244e
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Author: Bartlomiej Sieka <tur@semihalf.com>
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Date: Tue Jan 23 17:22:06 2007 +0100
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[iDMR] Add MTD and JFFS2 support, also add default partition definition.
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commit f7db33101fbc9c8f0a10738ce87034875a17aeb9
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Author: Bartlomiej Sieka <tur@semihalf.com>
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Date: Tue Jan 23 14:21:14 2007 +0100
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[iDMR] Flash driver on initialisation write-protects some sectors,
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currently sectors 0-3. Sector 3 does not need to be protected, though
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(U-boot occupies sectors 0-1 and the environment sector 2). This commit
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fixes this, i.e., only sectors 0-2 are protected.
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commit 0ed47bb119cd2c4c16edb2548789148f9e6dc9de
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Author: Bartlomiej Sieka <tur@semihalf.com>
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Date: Tue Jan 23 14:11:22 2007 +0100
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[iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,
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"mii device" results in "Unexpected exception"). Fixing this properly
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requires some clean-up in the FEC drivers infrastructure for ColdFire, so
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this commit disables MII commads for now.
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commit 363d1d8f9c99b63daef81f5985cab3fc00edde5c
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Author: Bartlomiej Sieka <tur@semihalf.com>
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Date: Tue Jan 23 13:25:22 2007 +0100
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[ColdFire MCF5271 family] Add CPU detection based on the value of Chip
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Identification Register (CIR).
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commit a4012396645533aef218354eeba754dff0deace8
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Fri Jan 19 23:08:39 2007 +0100
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Minor code cleanup.
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commit f539b7ba7d7ef6dd187c8209609001cb1cd95e39
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Author: Heiko Schocher <hs@pollux.denx.de>
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Date: Fri Jan 19 19:57:10 2007 +0100
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@ -28,4 +28,3 @@
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#address where u-boot will be relocated
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#TEXT_BASE = 0x0
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TEXT_BASE = 0x81500000
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File diff suppressed because it is too large
Load Diff
@ -350,7 +350,6 @@ int write_buff_sst (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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src_org++;
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}
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return ret;
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}
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@ -78,7 +78,7 @@ lowlevel_init:
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ldmneia r0, {r3-r9}
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stmneia r2, {r3-r9}
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/* Set-up MEMMAP register, so vectors are taken from SRAM */
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/* Set-up MEMMAP register, so vectors are taken from SRAM */
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ldr r0, MEMMAP_ADR
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mov r1, #0x02 /* vectors re-mapped to static RAM */
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str r1, [r0]
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@ -79,6 +79,4 @@ static inline void spi_set_cfg(unsigned char phase,
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PUT8(S0SPCR, v);
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}
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#endif
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#endif /* SPI_H */
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