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LPC2292 SODIMM port coding style cleanup.

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This commit is contained in:
Wolfgang Denk 2007-01-30 00:50:40 +01:00 committed by Wolfgang Denk
parent 6bd2447ee4
commit f8db84f132
10 changed files with 409 additions and 369 deletions
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43
CHANGELOG
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@ -1,3 +1,46 @@
commit 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3
Author: Gary Jennejohn <garyj@pollux.denx.de>
Date: Wed Jan 24 12:16:56 2007 +0100
Add port for the lpc2292sodimm evaluation board from EmbeddedArtists
commit 2daf046ba627f85f44195815778140039636244e
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Tue Jan 23 17:22:06 2007 +0100
[iDMR] Add MTD and JFFS2 support, also add default partition definition.
commit f7db33101fbc9c8f0a10738ce87034875a17aeb9
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Tue Jan 23 14:21:14 2007 +0100
[iDMR] Flash driver on initialisation write-protects some sectors,
currently sectors 0-3. Sector 3 does not need to be protected, though
(U-boot occupies sectors 0-1 and the environment sector 2). This commit
fixes this, i.e., only sectors 0-2 are protected.
commit 0ed47bb119cd2c4c16edb2548789148f9e6dc9de
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Tue Jan 23 14:11:22 2007 +0100
[iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,
"mii device" results in "Unexpected exception"). Fixing this properly
requires some clean-up in the FEC drivers infrastructure for ColdFire, so
this commit disables MII commads for now.
commit 363d1d8f9c99b63daef81f5985cab3fc00edde5c
Author: Bartlomiej Sieka <tur@semihalf.com>
Date: Tue Jan 23 13:25:22 2007 +0100
[ColdFire MCF5271 family] Add CPU detection based on the value of Chip
Identification Register (CIR).
commit a4012396645533aef218354eeba754dff0deace8
Author: Wolfgang Denk <wd@pollux.denx.de>
Date: Fri Jan 19 23:08:39 2007 +0100
Minor code cleanup.
commit f539b7ba7d7ef6dd187c8209609001cb1cd95e39
Author: Heiko Schocher <hs@pollux.denx.de>
Date: Fri Jan 19 19:57:10 2007 +0100

1
board/lpc2292sodimm/config.mk
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@ -28,4 +28,3 @@
#address where u-boot will be relocated
#TEXT_BASE = 0x0
TEXT_BASE = 0x81500000

651
board/lpc2292sodimm/eth.c
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File diff suppressed because it is too large Load Diff

31
board/lpc2292sodimm/flash.c
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@ -64,7 +64,7 @@ int get_flash_sector(flash_info_t * info, ulong flash_addr)
/*-----------------------------------------------------------------------
* This function assumes that flash_addr is aligned on 512 bytes boundary
* in flash. This function also assumes that prepare have been called
* in flash. This function also assumes that prepare have been called
* for the sector in question.
*/
int copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
@ -141,7 +141,7 @@ ulong flash_init (void)
for (j = 0; j < 7; j++, k++) {
flash_info[0].start[k] = flashbase;
flashbase += 0x00002000;
}
}
size += flash_info[0].size;
flash_info[1].flash_id = (SST_MANUFACT & FLASH_VENDMASK);
@ -163,7 +163,7 @@ ulong flash_init (void)
flash_protect (FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
return size;
@ -292,9 +292,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
{
switch (info->flash_id & FLASH_VENDMASK) {
case (SST_MANUFACT & FLASH_VENDMASK):
return flash_erase_sst(info, s_first, s_last);
return flash_erase_sst(info, s_first, s_last);
case (PHILIPS_LPC2292 & FLASH_VENDMASK):
return flash_erase_philips(info, s_first, s_last);
return flash_erase_philips(info, s_first, s_last);
default:
return ERR_PROTECTED;
}
@ -350,13 +350,12 @@ int write_buff_sst (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
src_org++;
}
return ret;
}
int write_buff_philips (flash_info_t * info,
uchar * src,
ulong addr,
int write_buff_philips (flash_info_t * info,
uchar * src,
ulong addr,
ulong cnt)
{
int first_copy_size;
@ -393,9 +392,9 @@ int write_buff_philips (flash_info_t * info,
#endif
/* copy first block */
memcpy((void*)COPY_BUFFER_LOCATION,
memcpy((void*)COPY_BUFFER_LOCATION,
(void*)(first_block * 512), 512);
memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
src, first_copy_size);
copy_buffer_to_flash(info, first_block * 512);
src += first_copy_size;
@ -414,7 +413,7 @@ int write_buff_philips (flash_info_t * info,
memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
copy_buffer_to_flash(info, addr);
src += 512;
addr += 512;
addr += 512;
}
@ -431,9 +430,9 @@ int write_buff_philips (flash_info_t * info,
(ulong)addr);
#endif
/* copy last block */
memcpy((void*)COPY_BUFFER_LOCATION,
memcpy((void*)COPY_BUFFER_LOCATION,
(void*)(last_block * 512), 512);
memcpy((void*)COPY_BUFFER_LOCATION,
memcpy((void*)COPY_BUFFER_LOCATION,
src, last_copy_size);
copy_buffer_to_flash(info, addr);
}
@ -467,9 +466,9 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
switch (info->flash_id & FLASH_VENDMASK) {
case (SST_MANUFACT & FLASH_VENDMASK):
return write_buff_sst(info, src, addr, cnt);
return write_buff_sst(info, src, addr, cnt);
case (PHILIPS_LPC2292 & FLASH_VENDMASK):
return write_buff_philips(info, src, addr, cnt);
return write_buff_philips(info, src, addr, cnt);
default:
return ERR_PROG_ERROR;
}

2
board/lpc2292sodimm/iap_entry.S
View File

@ -1,5 +1,5 @@
IAP_ADDRESS: .word 0x7FFFFFF1
.globl iap_entry
iap_entry:
ldr r2, IAP_ADDRESS

16
board/lpc2292sodimm/lowlevel_init.S
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@ -27,10 +27,10 @@
#define SRAM_SIZE 0x00004000
#define BCFG0_VALUE 0x1000ffef
#define BCFG1_VALUE 0x10001C61
_TEXT_BASE:
.word TEXT_BASE
MEMMAP_ADR:
MEMMAP_ADR:
.word MEMMAP
BCFG0_ADR:
.word BCFG0
@ -69,19 +69,19 @@ lowlevel_init:
and r1, r1, r2
orr r1, r1, r3
str r1, [r0]
/* move vectors to beginning of SRAM */
mov r2, #SRAM_START
mov r2, #SRAM_START
mov r0, #0 /*_start*/
ldmneia r0!, {r3-r10}
stmneia r2!, {r3-r10}
ldmneia r0!, {r3-r10}
stmneia r2!, {r3-r10}
ldmneia r0, {r3-r9}
stmneia r2, {r3-r9}
/* Set-up MEMMAP register, so vectors are taken from SRAM */
/* Set-up MEMMAP register, so vectors are taken from SRAM */
ldr r0, MEMMAP_ADR
mov r1, #0x02 /* vectors re-mapped to static RAM */
str r1, [r0]
/* everything is fine now */
mov pc, lr

8
board/lpc2292sodimm/mmc.c
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@ -41,8 +41,8 @@ block_dev_desc_t * mmc_get_dev(int dev)
return (block_dev_desc_t *)(&mmc_dev);
}
unsigned long mmc_block_read(int dev,
unsigned long start,
unsigned long mmc_block_read(int dev,
unsigned long start,
lbaint_t blkcnt,
unsigned long *buffer)
{
@ -52,7 +52,7 @@ unsigned long mmc_block_read(int dev,
unsigned long addr = start;
#ifdef MMC_DEBUG
printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
(unsigned long)blkcnt);
#endif
@ -64,7 +64,7 @@ unsigned long mmc_block_read(int dev,
rc++;
addr++;
p += hw_sect_size;
}
}
return rc;
}

12
board/lpc2292sodimm/mmc_hw.c
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@ -24,7 +24,7 @@
#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
#define MMC_Disable() PUT32(IO1SET, 1l << 22)
#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
static unsigned char Write_Command_MMC (unsigned char *CMD);
static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
@ -124,7 +124,7 @@ void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
MMC_Disable();
spi_unlock();
return;
}
}
while (spi_read() != 0xfe) {};
for (a = 0; a < Bytes; a++)
@ -146,7 +146,7 @@ void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
{
/* Command 16 to read aBlocks from the MMC/SD - caed */
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
/* The addres on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
@ -171,7 +171,7 @@ unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
unsigned char tmp, a;
unsigned short int b;
/* Command 24 to write a block to the MMC/SD - card */
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
/* The addres on the MMC/SD-card is in bytes,
addr is transformed from blocks to bytes and the result is
@ -193,14 +193,14 @@ unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
MMC_Disable();
spi_unlock();
return(tmp);
}
}
/* Do a short delay and send a clock-pulse to the MMC/SD-card */
for (a = 0; a < 100; a++)
spi_read();
/* Send a start byte to the MMC/SD-card */
spi_write(0xFE);
spi_write(0xFE);
/* Write the block (512 bytes) to the MMC/SD-card */
for (b = 0; b < 512; b++)

4
board/lpc2292sodimm/spi.h
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@ -79,6 +79,4 @@ static inline void spi_set_cfg(unsigned char phase,
PUT8(S0SPCR, v);
}
#endif
#endif /* SPI_H */

10
cpu/arm720t/start.S
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@ -328,13 +328,13 @@ cpu_init_crit:
/* Set-up PLL */
mov r3, #0xAA
mov r4, #0x55
/* First disconnect and disable the PLL */
/* First disconnect and disable the PLL */
ldr r0, PLLCON_ADR
mov r1, #0x00
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
str r4, [r0] /* feed sequence done */
/* Set new M and P values */
ldr r0, PLLCFG_ADR
mov r1, #0x23 /* M=4 and P=2 */
@ -349,10 +349,10 @@ cpu_init_crit:
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
/* Wait for the lock */
/* Wait for the lock */
ldr r0, PLLSTAT_ADR
mov r1, #0x400 /* lock bit */
lock_loop:
lock_loop:
ldr r2, [r0]
and r2, r1, r2
cmp r2, #0
@ -363,7 +363,7 @@ lock_loop:
str r1, [r0]
ldr r0, PLLFEED_ADR /* start feed sequence */
str r3, [r0]
str r4, [r0] /* feed sequence done */
str r4, [r0] /* feed sequence done */
/* Set-up VPBDIV register */
ldr r0, VPBDIV_ADR
mov r1, #0x01 /* VPB clock is same as process clock */