driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
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README
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README
@ -2395,6 +2395,8 @@ CBFS (Coreboot Filesystem) support
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- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
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If those defines are not set, default value is 100000
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for speed, and 0 for slave.
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- enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
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- enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
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- drivers/i2c/rcar_i2c.c:
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- activate this driver with CONFIG_SYS_I2C_RCAR
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@ -114,6 +114,9 @@ static u16 i2c_clk_div[50][2] = {
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#ifndef CONFIG_SYS_MXC_I2C3_SPEED
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#define CONFIG_SYS_MXC_I2C3_SPEED 100000
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#endif
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#ifndef CONFIG_SYS_MXC_I2C4_SPEED
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#define CONFIG_SYS_MXC_I2C4_SPEED 100000
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#endif
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#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
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#define CONFIG_SYS_MXC_I2C1_SLAVE 0
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@ -124,6 +127,9 @@ static u16 i2c_clk_div[50][2] = {
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#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
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#define CONFIG_SYS_MXC_I2C3_SLAVE 0
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#endif
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#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
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#define CONFIG_SYS_MXC_I2C4_SLAVE 0
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#endif
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/*
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@ -543,12 +549,17 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
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mxc_i2c_set_bus_speed,
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CONFIG_SYS_MXC_I2C2_SPEED,
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CONFIG_SYS_MXC_I2C2_SLAVE, 1)
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#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
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defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
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defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
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#ifdef CONFIG_SYS_I2C_MXC_I2C3
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U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
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mxc_i2c_read, mxc_i2c_write,
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mxc_i2c_set_bus_speed,
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CONFIG_SYS_MXC_I2C3_SPEED,
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CONFIG_SYS_MXC_I2C3_SLAVE, 2)
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#endif
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#ifdef CONFIG_SYS_I2C_MXC_I2C4
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U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
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mxc_i2c_read, mxc_i2c_write,
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mxc_i2c_set_bus_speed,
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CONFIG_SYS_MXC_I2C4_SPEED,
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CONFIG_SYS_MXC_I2C4_SLAVE, 3)
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#endif
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@ -262,6 +262,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0x7f
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#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
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@ -245,6 +245,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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@ -55,6 +55,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* USB Configs */
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@ -52,6 +52,7 @@
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
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#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
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#define CONFIG_MXC_SPI
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@ -95,6 +95,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_I2C_GSC 0
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#define CONFIG_I2C_PMIC 1
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@ -38,6 +38,7 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
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#define CONFIG_MXC_UART
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@ -389,6 +389,7 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/*
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* I2C bus multiplexer
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@ -205,6 +205,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* EEPROM */
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#ifndef CONFIG_SD_BOOT
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@ -84,6 +84,8 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
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#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
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#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
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@ -176,6 +176,7 @@
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
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#endif
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@ -42,6 +42,7 @@
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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@ -48,6 +48,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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@ -41,6 +41,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* PMIC Configs */
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#define CONFIG_POWER
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@ -76,6 +76,7 @@
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* PMIC Controller */
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#define CONFIG_POWER
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@ -38,6 +38,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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@ -56,6 +56,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* NAND flash command */
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@ -52,6 +52,7 @@
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_I2C_EDID
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* OCOTP Configs */
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/* I2C config */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* MMC config */
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@ -199,6 +199,7 @@
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_I2C_EDID
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#endif
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* MMC Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* MMC Configuration */
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_SPD_BUS_NUM 0
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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