board: ti: dra71x-evm: Add PMIC support
Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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@ -324,6 +324,9 @@
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/* Standard offset is 0.5v expressed in uv */
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#define PALMAS_SMPS_BASE_VOLT_UV 500000
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/* Offset is 0.73V for LP873x */
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#define LP873X_BUCK_BASE_VOLT_UV 730000
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/* TPS659038 */
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#define TPS659038_I2C_SLAVE_ADDR 0x58
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#define TPS659038_REG_ADDR_SMPS12 0x23
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@ -338,6 +341,11 @@
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#define TPS65917_REG_ADDR_SMPS2 0x27
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#define TPS65917_REG_ADDR_SMPS3 0x2F
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/* LP873X */
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#define LP873X_I2C_SLAVE_ADDR 0x60
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#define LP873X_REG_ADDR_BUCK0 0x6
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#define LP873X_REG_ADDR_BUCK1 0x7
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#define LP873X_REG_ADDR_LDO1 0xA
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/* TPS */
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#define TPS62361_I2C_SLAVE_ADDR 0x60
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@ -600,6 +600,7 @@ extern struct omap_sys_ctrl_regs const omap5_ctrl;
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extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
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extern struct pmic_data tps659038;
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extern struct pmic_data lp8733;
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void hw_data_init(void);
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@ -336,6 +336,22 @@ struct pmic_data tps659038 = {
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.gpio_en = 0,
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};
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/* The LP8732 and LP8733 are software-compatible, use common struct */
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struct pmic_data lp8733 = {
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.base_offset = LP873X_BUCK_BASE_VOLT_UV,
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.step = 5000, /* 5 mV represented in uV */
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/*
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* Offset codes 0 - 0x13 Invalid.
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* Offset codes 0x14 0x17 give 10mV steps
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* Offset codes 0x17 through 0x9D give 5mV steps
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* So let us start with our operating range from .73V
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*/
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.start_code = 0x17,
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.i2c_slave_addr = 0x60,
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.pmic_bus_init = gpi2c_init,
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.pmic_write = palmas_i2c_write_u8,
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};
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struct vcores_data omap5430_volts = {
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.mpu.value[OPP_NOM] = VDD_MPU,
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.mpu.addr = SMPS_REG_ADDR_12_MPU,
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@ -408,10 +408,60 @@ struct vcores_data dra722_volts = {
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.iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
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};
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struct vcores_data dra718_volts = {
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/*
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* In the case of dra71x GPU MPU and CORE
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* are all powered up by BUCK0 of LP873X PMIC
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*/
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.mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
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.mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
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.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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.mpu.addr = LP873X_REG_ADDR_BUCK0,
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.mpu.pmic = &lp8733,
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.mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
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.core.value[OPP_NOM] = VDD_CORE_DRA7_NOM,
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.core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM,
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.core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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.core.addr = LP873X_REG_ADDR_BUCK0,
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.core.pmic = &lp8733,
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.gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
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.gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
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.gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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.gpu.addr = LP873X_REG_ADDR_BUCK0,
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.gpu.pmic = &lp8733,
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.gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
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/*
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* The DSPEVE and IVA rails are grouped on DRA71x-evm
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* and are powered by BUCK1 of LP873X PMIC
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*/
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.eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
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.eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
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.eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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.eve.addr = LP873X_REG_ADDR_BUCK1,
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.eve.pmic = &lp8733,
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.eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
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.iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
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.iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
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.iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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.iva.addr = LP873X_REG_ADDR_BUCK1,
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.iva.pmic = &lp8733,
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.iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
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};
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int get_voltrail_opp(int rail_offset)
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{
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int opp;
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/*
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* DRA71x supports only OPP_NOM.
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*/
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if (board_is_dra71x_evm())
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return OPP_NOM;
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switch (rail_offset) {
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case VOLT_MPU:
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opp = DRA7_MPU_OPP;
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@ -541,6 +591,8 @@ void vcores_init(void)
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*omap_vcores = &dra752_volts;
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} else if (board_is_dra72x_evm()) {
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*omap_vcores = &dra722_volts;
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} else if (board_is_dra71x_evm()) {
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*omap_vcores = &dra718_volts;
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} else {
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/* If EEPROM is not populated */
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if (is_dra72x())
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