Merge git://www.denx.de/git/u-boot-marvell

This includes Marvell mvpp2 patches with the ethernet support for the
ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe
and he is okay with me pushing them via the Marvell tree.
This commit is contained in:
Tom Rini 2017-04-04 09:17:56 -04:00
commit f532703665
11 changed files with 1785 additions and 254 deletions

View File

@ -159,7 +159,7 @@
&cpm_comphy { &cpm_comphy {
phy0 { phy0 {
phy-type = <PHY_TYPE_SGMII2>; phy-type = <PHY_TYPE_SGMII2>;
phy-speed = <PHY_SPEED_3_125G>; phy-speed = <PHY_SPEED_1_25G>;
}; };
phy1 { phy1 {
@ -209,3 +209,28 @@
no-1-8-v; no-1-8-v;
non-removable; non-removable;
}; };
&cpm_mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpm_ethernet {
status = "okay";
};
&cpm_eth1 {
status = "okay";
phy = <&phy0>;
phy-mode = "sgmii";
};
&cpm_eth2 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};

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@ -283,3 +283,19 @@
&cps_utmi0 { &cps_utmi0 {
status = "okay"; status = "okay";
}; };
&cpm_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&cpm_ethernet {
status = "okay";
};
&cpm_eth2 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};

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@ -61,6 +61,43 @@
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
ranges = <0x0 0x0 0xf2000000 0x2000000>; ranges = <0x0 0x0 0xf2000000 0x2000000>;
cpm_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
status = "disabled";
dma-coherent;
cpm_eth0: eth0 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
port-id = <0>;
gop-port-id = <0>;
status = "disabled";
};
cpm_eth1: eth1 {
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
port-id = <1>;
gop-port-id = <2>;
status = "disabled";
};
cpm_eth2: eth2 {
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
port-id = <2>;
gop-port-id = <3>;
status = "disabled";
};
};
cpm_mdio: mdio@12a200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>;
};
cpm_syscon0: system-controller@440000 { cpm_syscon0: system-controller@440000 {
compatible = "marvell,cp110-system-controller0", compatible = "marvell,cp110-system-controller0",
"syscon"; "syscon";

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@ -61,6 +61,43 @@
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
ranges = <0x0 0x0 0xf4000000 0x2000000>; ranges = <0x0 0x0 0xf4000000 0x2000000>;
cps_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
status = "disabled";
dma-coherent;
cps_eth0: eth0 {
interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
port-id = <0>;
gop-port-id = <0>;
status = "disabled";
};
cps_eth1: eth1 {
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
port-id = <1>;
gop-port-id = <2>;
status = "disabled";
};
cps_eth2: eth2 {
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
port-id = <2>;
gop-port-id = <3>;
status = "disabled";
};
};
cps_mdio: mdio@12a200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0x12a200 0x10>;
};
cps_syscon0: system-controller@440000 { cps_syscon0: system-controller@440000 {
compatible = "marvell,cp110-system-controller0", compatible = "marvell,cp110-system-controller0",
"syscon"; "syscon";

View File

@ -47,7 +47,8 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y
CONFIG_MVPP2=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_DM_PCI=y CONFIG_DM_PCI=y
CONFIG_PCIE_DW_MVEBU=y CONFIG_PCIE_DW_MVEBU=y

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@ -47,7 +47,8 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y
CONFIG_MVPP2=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_DM_PCI=y CONFIG_DM_PCI=y
CONFIG_PCIE_DW_MVEBU=y CONFIG_PCIE_DW_MVEBU=y

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@ -124,12 +124,12 @@ config FEC_MXC
NXP i.MX processors. NXP i.MX processors.
config MVPP2 config MVPP2
bool "Marvell Armada 375 network interface support" bool "Marvell Armada 375/7K/8K network interface support"
depends on ARMADA_375 depends on ARMADA_375 || ARMADA_8K
select PHYLIB select PHYLIB
help help
This driver supports the network interface units in the This driver supports the network interface units in the
Marvell ARMADA 375 SoC. Marvell ARMADA 375, 7K and 8K SoCs.
config MACB config MACB
bool "Cadence MACB/GEM Ethernet Interface" bool "Cadence MACB/GEM Ethernet Interface"

File diff suppressed because it is too large Load Diff

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@ -81,6 +81,14 @@
#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
/*
* Ethernet Driver configuration
*/
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
/* USB 2.0 */ /* USB 2.0 */
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3

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@ -2,6 +2,7 @@
#define _LINUX_BITOPS_H #define _LINUX_BITOPS_H
#include <asm/types.h> #include <asm/types.h>
#include <asm-generic/bitsperlong.h>
#include <linux/compiler.h> #include <linux/compiler.h>
#define BIT(nr) (1UL << (nr)) #define BIT(nr) (1UL << (nr))

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@ -63,6 +63,9 @@ typedef enum {
PHY_INTERFACE_MODE_RGMII_TXID, PHY_INTERFACE_MODE_RGMII_TXID,
PHY_INTERFACE_MODE_RTBI, PHY_INTERFACE_MODE_RTBI,
PHY_INTERFACE_MODE_XGMII, PHY_INTERFACE_MODE_XGMII,
PHY_INTERFACE_MODE_XAUI,
PHY_INTERFACE_MODE_RXAUI,
PHY_INTERFACE_MODE_SFI,
PHY_INTERFACE_MODE_NONE, /* Must be last */ PHY_INTERFACE_MODE_NONE, /* Must be last */
PHY_INTERFACE_MODE_COUNT, PHY_INTERFACE_MODE_COUNT,
@ -82,6 +85,9 @@ static const char *phy_interface_strings[] = {
[PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid", [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
[PHY_INTERFACE_MODE_RTBI] = "rtbi", [PHY_INTERFACE_MODE_RTBI] = "rtbi",
[PHY_INTERFACE_MODE_XGMII] = "xgmii", [PHY_INTERFACE_MODE_XGMII] = "xgmii",
[PHY_INTERFACE_MODE_XAUI] = "xaui",
[PHY_INTERFACE_MODE_RXAUI] = "rxaui",
[PHY_INTERFACE_MODE_SFI] = "sfi",
[PHY_INTERFACE_MODE_NONE] = "", [PHY_INTERFACE_MODE_NONE] = "",
}; };