tegra: Move boards over to use arch-level board UART function
Now that we can set up the UART in common tegra code, make the boards use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -27,6 +27,7 @@
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#include <ns16550.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/board.h>
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#include <asm/arch/tegra2.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/clk_rst.h>
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@ -55,44 +56,6 @@ int timer_init(void)
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return 0;
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}
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static void enable_uart(enum periph_id pid)
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{
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/* Assert UART reset and enable clock */
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reset_set_enable(pid, 1);
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clock_enable(pid);
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clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
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/* wait for 2us */
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udelay(2);
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/* De-assert reset to UART */
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reset_set_enable(pid, 0);
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}
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/*
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* Routine: clock_init_uart
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* Description: init the PLL and clock for the UART(s)
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*/
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static void clock_init_uart(void)
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{
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#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
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enable_uart(PERIPH_ID_UART4);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
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}
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/*
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* Routine: pin_mux_uart
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* Description: setup the pin muxes/tristate values for the UART(s)
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*/
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static void pin_mux_uart(void)
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{
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#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
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pinmux_tristate_disable(PINGRP_GMC);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
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}
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#ifdef CONFIG_TEGRA2_MMC
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/*
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* Routine: pin_mux_mmc
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@ -146,15 +109,8 @@ int board_mmc_init(bd_t *bd)
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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/* Initialize essential common plls */
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clock_early_init();
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/* Initialize UART clocks */
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clock_init_uart();
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/* Initialize periph pinmuxes */
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pin_mux_uart();
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/* Initialize selected UARTs */
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board_init_uart_f();
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return 0;
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}
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#endif /* EARLY_INIT */
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@ -27,6 +27,7 @@
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#include <asm/arch/tegra2.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/board.h>
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#include <asm/arch/clk_rst.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/pinmux.h>
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@ -36,13 +37,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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enum {
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/* UARTs which we can enable */
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UARTA = 1 << 0,
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UARTB = 1 << 1,
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UARTD = 1 << 3,
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};
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const struct tegra2_sysinfo sysinfo = {
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CONFIG_TEGRA2_BOARD_STRING
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};
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@ -56,56 +50,6 @@ int timer_init(void)
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return 0;
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}
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static void enable_uart(enum periph_id pid)
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{
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/* Assert UART reset and enable clock */
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reset_set_enable(pid, 1);
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clock_enable(pid);
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clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
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/* wait for 2us */
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udelay(2);
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/* De-assert reset to UART */
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reset_set_enable(pid, 0);
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}
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/*
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* Routine: clock_init_uart
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* Description: init clock for the UART(s)
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*/
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static void clock_init_uart(int uart_ids)
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{
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if (uart_ids & UARTA)
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enable_uart(PERIPH_ID_UART1);
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if (uart_ids & UARTB)
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enable_uart(PERIPH_ID_UART2);
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if (uart_ids & UARTD)
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enable_uart(PERIPH_ID_UART4);
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}
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/*
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* Routine: pin_mux_uart
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* Description: setup the pin muxes/tristate values for the UART(s)
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*/
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static void pin_mux_uart(int uart_ids)
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{
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if (uart_ids & UARTA) {
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pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
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pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_IRRX);
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pinmux_tristate_disable(PINGRP_IRTX);
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}
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if (uart_ids & UARTB) {
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pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
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pinmux_tristate_disable(PINGRP_UAD);
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}
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if (uart_ids & UARTD) {
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
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pinmux_tristate_disable(PINGRP_GMC);
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}
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}
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/*
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* Routine: board_init
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* Description: Early hardware init.
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@ -131,23 +75,7 @@ int board_init(void)
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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int uart_ids = 0; /* bit mask of which UART ids to enable */
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#ifdef CONFIG_TEGRA2_ENABLE_UARTA
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uart_ids |= UARTA;
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#endif
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#ifdef CONFIG_TEGRA2_ENABLE_UARTB
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uart_ids |= UARTB;
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#endif
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#ifdef CONFIG_TEGRA2_ENABLE_UARTD
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uart_ids |= UARTD;
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#endif
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/* Initialize UART clocks */
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clock_init_uart(uart_ids);
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/* Initialize periph pinmuxes */
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pin_mux_uart(uart_ids);
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board_init_uart_f();
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/* Initialize periph GPIOs */
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#ifdef CONFIG_SPI_UART_SWITCH
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