net: rtl8139: Use dev->iobase instead of custom ioaddr
Replace the use of custom static ioaddr variable with common dev->iobase, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Marek Vasut
Tom Rini
parent
1ba8d98445
commit
f4385539f1
@ -192,7 +192,6 @@
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#define RTL_STS_RXSTATUSOK BIT(0)
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static unsigned int cur_rx, cur_tx;
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static int ioaddr;
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/* The RTL8139 can only transmit from a contiguous, aligned memory block. */
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static unsigned char tx_buffer[TX_BUF_SIZE] __aligned(4);
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@ -223,42 +222,43 @@ static void rtl8139_eeprom_delay(uintptr_t regbase)
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inl(regbase + RTL_REG_CFG9346);
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}
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static int rtl8139_read_eeprom(unsigned int location, unsigned int addr_len)
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static int rtl8139_read_eeprom(struct eth_device *dev,
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unsigned int location, unsigned int addr_len)
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{
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unsigned int read_cmd = location | (EE_READ_CMD << addr_len);
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uintptr_t ee_addr = ioaddr + RTL_REG_CFG9346;
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uintptr_t ee_addr = dev->iobase + RTL_REG_CFG9346;
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unsigned int retval = 0;
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u8 dataval;
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int i;
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outb(EE_ENB & ~EE_CS, ee_addr);
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outb(EE_ENB, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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/* Shift the read command bits out. */
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for (i = 4 + addr_len; i >= 0; i--) {
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dataval = (read_cmd & BIT(i)) ? EE_DATA_WRITE : 0;
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outb(EE_ENB | dataval, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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}
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outb(EE_ENB, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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for (i = 16; i > 0; i--) {
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outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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retval <<= 1;
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retval |= inb(ee_addr) & EE_DATA_READ;
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outb(EE_ENB, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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}
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/* Terminate the EEPROM access. */
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outb(~EE_CS, ee_addr);
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rtl8139_eeprom_delay(ioaddr);
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rtl8139_eeprom_delay(dev->iobase);
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return retval;
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}
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@ -275,10 +275,10 @@ static void rtl8139_set_rx_mode(struct eth_device *dev)
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RTL_REG_RXCONFIG_ACCEPTMULTICAST |
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RTL_REG_RXCONFIG_ACCEPTMYPHYS;
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outl(rtl8139_rx_config | rx_mode, ioaddr + RTL_REG_RXCONFIG);
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outl(rtl8139_rx_config | rx_mode, dev->iobase + RTL_REG_RXCONFIG);
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outl(0xffffffff, ioaddr + RTL_REG_MAR0 + 0);
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outl(0xffffffff, ioaddr + RTL_REG_MAR0 + 4);
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outl(0xffffffff, dev->iobase + RTL_REG_MAR0 + 0);
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outl(0xffffffff, dev->iobase + RTL_REG_MAR0 + 4);
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}
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static void rtl8139_hw_reset(struct eth_device *dev)
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@ -286,11 +286,11 @@ static void rtl8139_hw_reset(struct eth_device *dev)
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u8 reg;
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int i;
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outb(RTL_REG_CHIPCMD_CMDRESET, ioaddr + RTL_REG_CHIPCMD);
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outb(RTL_REG_CHIPCMD_CMDRESET, dev->iobase + RTL_REG_CHIPCMD);
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/* Give the chip 10ms to finish the reset. */
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for (i = 0; i < 100; i++) {
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reg = inb(ioaddr + RTL_REG_CHIPCMD);
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reg = inb(dev->iobase + RTL_REG_CHIPCMD);
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if (!(reg & RTL_REG_CHIPCMD_CMDRESET))
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break;
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@ -308,15 +308,15 @@ static void rtl8139_reset(struct eth_device *dev)
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rtl8139_hw_reset(dev);
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for (i = 0; i < ETH_ALEN; i++)
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outb(dev->enetaddr[i], ioaddr + RTL_REG_MAC0 + i);
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outb(dev->enetaddr[i], dev->iobase + RTL_REG_MAC0 + i);
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/* Must enable Tx/Rx before setting transfer thresholds! */
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outb(RTL_REG_CHIPCMD_CMDRXENB | RTL_REG_CHIPCMD_CMDTXENB,
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ioaddr + RTL_REG_CHIPCMD);
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dev->iobase + RTL_REG_CHIPCMD);
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/* accept no frames yet! */
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outl(rtl8139_rx_config, ioaddr + RTL_REG_RXCONFIG);
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outl((TX_DMA_BURST << 8) | 0x03000000, ioaddr + RTL_REG_TXCONFIG);
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outl(rtl8139_rx_config, dev->iobase + RTL_REG_RXCONFIG);
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outl((TX_DMA_BURST << 8) | 0x03000000, dev->iobase + RTL_REG_TXCONFIG);
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/*
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* The Linux driver changes RTL_REG_CONFIG1 here to use a different
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@ -331,7 +331,7 @@ static void rtl8139_reset(struct eth_device *dev)
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debug_cond(DEBUG_RX, "rx ring address is %p\n", rx_ring);
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flush_cache((unsigned long)rx_ring, RX_BUF_LEN);
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outl(phys_to_bus((int)rx_ring), ioaddr + RTL_REG_RXBUF);
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outl(phys_to_bus((int)rx_ring), dev->iobase + RTL_REG_RXBUF);
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/*
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* If we add multicast support, the RTL_REG_MAR0 register would have
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@ -340,17 +340,17 @@ static void rtl8139_reset(struct eth_device *dev)
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* unicast.
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*/
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outb(RTL_REG_CHIPCMD_CMDRXENB | RTL_REG_CHIPCMD_CMDTXENB,
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ioaddr + RTL_REG_CHIPCMD);
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dev->iobase + RTL_REG_CHIPCMD);
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outl(rtl8139_rx_config, ioaddr + RTL_REG_RXCONFIG);
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outl(rtl8139_rx_config, dev->iobase + RTL_REG_RXCONFIG);
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/* Start the chip's Tx and Rx process. */
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outl(0, ioaddr + RTL_REG_RXMISSED);
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outl(0, dev->iobase + RTL_REG_RXMISSED);
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rtl8139_set_rx_mode(dev);
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/* Disable all known interrupts by setting the interrupt mask. */
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outw(0, ioaddr + RTL_REG_INTRMASK);
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outw(0, dev->iobase + RTL_REG_INTRMASK);
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}
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static int rtl8139_send(struct eth_device *dev, void *packet, int length)
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@ -360,8 +360,6 @@ static int rtl8139_send(struct eth_device *dev, void *packet, int length)
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unsigned int status;
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int i = 0;
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ioaddr = dev->iobase;
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memcpy(tx_buffer, packet, length);
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debug_cond(DEBUG_TX, "sending %d bytes\n", len);
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@ -375,12 +373,12 @@ static int rtl8139_send(struct eth_device *dev, void *packet, int length)
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flush_cache((unsigned long)tx_buffer, length);
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outl(phys_to_bus((unsigned long)tx_buffer),
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ioaddr + RTL_REG_TXADDR0 + cur_tx * 4);
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dev->iobase + RTL_REG_TXADDR0 + cur_tx * 4);
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outl(((TX_FIFO_THRESH << 11) & 0x003f0000) | len,
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ioaddr + RTL_REG_TXSTATUS0 + cur_tx * 4);
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dev->iobase + RTL_REG_TXSTATUS0 + cur_tx * 4);
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do {
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status = inw(ioaddr + RTL_REG_INTRSTATUS);
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status = inw(dev->iobase + RTL_REG_INTRSTATUS);
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/*
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* Only acknlowledge interrupt sources we can properly
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* handle here - the RTL_REG_INTRSTATUS_RXOVERFLOW/
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@ -389,14 +387,14 @@ static int rtl8139_send(struct eth_device *dev, void *packet, int length)
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*/
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status &= RTL_REG_INTRSTATUS_TXOK | RTL_REG_INTRSTATUS_TXERR |
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RTL_REG_INTRSTATUS_PCIERR;
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outw(status, ioaddr + RTL_REG_INTRSTATUS);
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outw(status, dev->iobase + RTL_REG_INTRSTATUS);
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if (status)
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break;
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udelay(10);
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} while (i++ < RTL_TIMEOUT);
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txstatus = inl(ioaddr + RTL_REG_TXSTATUS0 + cur_tx * 4);
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txstatus = inl(dev->iobase + RTL_REG_TXSTATUS0 + cur_tx * 4);
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if (!(status & RTL_REG_INTRSTATUS_TXOK)) {
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debug_cond(DEBUG_TX,
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@ -426,14 +424,12 @@ static int rtl8139_recv(struct eth_device *dev)
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unsigned int status;
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int length = 0;
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ioaddr = dev->iobase;
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if (inb(ioaddr + RTL_REG_CHIPCMD) & RTL_REG_CHIPCMD_RXBUFEMPTY)
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if (inb(dev->iobase + RTL_REG_CHIPCMD) & RTL_REG_CHIPCMD_RXBUFEMPTY)
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return 0;
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status = inw(ioaddr + RTL_REG_INTRSTATUS);
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status = inw(dev->iobase + RTL_REG_INTRSTATUS);
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/* See below for the rest of the interrupt acknowledges. */
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outw(status & ~rxstat, ioaddr + RTL_REG_INTRSTATUS);
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outw(status & ~rxstat, dev->iobase + RTL_REG_INTRSTATUS);
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debug_cond(DEBUG_RX, "%s: int %hX ", __func__, status);
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@ -474,13 +470,13 @@ static int rtl8139_recv(struct eth_device *dev)
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flush_cache((unsigned long)rx_ring, RX_BUF_LEN);
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cur_rx = ROUND(cur_rx + rx_size + 4, 4);
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outw(cur_rx - 16, ioaddr + RTL_REG_RXBUFPTR);
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outw(cur_rx - 16, dev->iobase + RTL_REG_RXBUFPTR);
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/*
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* See RTL8139 Programming Guide V0.1 for the official handling of
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* Rx overflow situations. The document itself contains basically
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* no usable information, except for a few exception handling rules.
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*/
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outw(status & rxstat, ioaddr + RTL_REG_INTRSTATUS);
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outw(status & rxstat, dev->iobase + RTL_REG_INTRSTATUS);
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return length;
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}
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@ -491,18 +487,16 @@ static int rtl8139_init(struct eth_device *dev, bd_t *bis)
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int addr_len, i;
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u8 reg;
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ioaddr = dev->iobase;
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/* Bring the chip out of low-power mode. */
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outb(0x00, ioaddr + RTL_REG_CONFIG1);
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outb(0x00, dev->iobase + RTL_REG_CONFIG1);
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addr_len = rtl8139_read_eeprom(0, 8) == 0x8129 ? 8 : 6;
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addr_len = rtl8139_read_eeprom(dev, 0, 8) == 0x8129 ? 8 : 6;
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for (i = 0; i < 3; i++)
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*ap++ = le16_to_cpu(rtl8139_read_eeprom(i + 7, addr_len));
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*ap++ = le16_to_cpu(rtl8139_read_eeprom(dev, i + 7, addr_len));
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rtl8139_reset(dev);
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reg = inb(ioaddr + RTL_REG_MEDIASTATUS);
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reg = inb(dev->iobase + RTL_REG_MEDIASTATUS);
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if (reg & RTL_REG_MEDIASTATUS_MSRLINKFAIL) {
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printf("Cable not connected or other link failure\n");
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return -1;
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@ -513,8 +507,6 @@ static int rtl8139_init(struct eth_device *dev, bd_t *bis)
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static void rtl8139_stop(struct eth_device *dev)
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{
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ioaddr = dev->iobase;
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rtl8139_hw_reset(dev);
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}
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