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imx: bootaux: support i.MX8M

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Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan 2018-01-10 13:20:33 +08:00 committed by Stefano Babic
parent 8cf223133c
commit ecd7ab5628
1 changed files with 10 additions and 0 deletions
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10
arch/arm/mach-imx/imx_bootaux.c
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@ -6,7 +6,9 @@
#include <common.h> #include <common.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/mach-imx/sys_proto.h>
#include <command.h> #include <command.h>
#include <imx_sip.h>
#include <linux/compiler.h> #include <linux/compiler.h>
int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
@ -24,14 +26,21 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
writel(pc, M4_BOOTROM_BASE_ADDR + 4); writel(pc, M4_BOOTROM_BASE_ADDR + 4);
/* Enable M4 */ /* Enable M4 */
#ifdef CONFIG_MX8M
call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
#else
clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET, clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK); SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
#endif
return 0; return 0;
} }
int arch_auxiliary_core_check_up(u32 core_id) int arch_auxiliary_core_check_up(u32 core_id)
{ {
#ifdef CONFIG_MX8M
return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
#else
unsigned int val; unsigned int val;
val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET); val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
@ -40,6 +49,7 @@ int arch_auxiliary_core_check_up(u32 core_id)
return 0; /* assert in reset */ return 0; /* assert in reset */
return 1; return 1;
#endif
} }
/* /*