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Merge git://www.denx.de/git/u-boot-marvell

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This commit is contained in:
Tom Rini 2017-11-16 09:32:04 -05:00
commit ebca2083d3
11 changed files with 60 additions and 17 deletions
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10
arch/arm/dts/armada-388-clearfog.dts
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@ -61,6 +61,7 @@
ethernet1 = &eth0;
ethernet2 = &eth1;
ethernet3 = &eth2;
spi1 = &spi1;
};
chosen {
@ -330,11 +331,9 @@
status = "okay";
};
spi@10680 {
spi1: spi@10680 {
/*
* We don't seem to have the W25Q32 on the
* A1 Rev 2.0 boards, so disable SPI.
* CS0: W25Q32 (doesn't appear to be present)
* CS0: W25Q32
* CS1:
* CS2: mikrobus
*/
@ -345,10 +344,9 @@
spi-flash@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "w25q32", "jedec,spi-nor";
compatible = "w25q32", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
status = "disabled";
};
};

41
arch/arm/mach-mvebu/cpu.c
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@ -554,6 +554,47 @@ void scsi_init(void)
}
#endif
#ifdef CONFIG_USB_XHCI_MVEBU
#define USB3_MAX_WINDOWS 4
#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
#define USB3_WIN_BASE(w) (0x4 + ((w) * 8))
static void xhci_mvebu_mbus_config(void __iomem *base,
const struct mbus_dram_target_info *dram)
{
int i;
for (i = 0; i < USB3_MAX_WINDOWS; i++) {
writel(0, base + USB3_WIN_CTRL(i));
writel(0, base + USB3_WIN_BASE(i));
}
for (i = 0; i < dram->num_cs; i++) {
const struct mbus_dram_window *cs = dram->cs + i;
/* Write size, attributes and target id to control register */
writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
(dram->mbus_dram_target_id << 4) | 1,
base + USB3_WIN_CTRL(i));
/* Write base address to base register */
writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(i));
}
}
int board_xhci_enable(fdt_addr_t base)
{
const struct mbus_dram_target_info *dram;
printf("MVEBU XHCI INIT controller @ 0x%lx\n", base);
dram = mvebu_mbus_dram_info();
xhci_mvebu_mbus_config((void __iomem *)base, dram);
return 0;
}
#endif
void enable_caches(void)
{
/* Avoid problem with e.g. neta ethernet driver */

2
board/Marvell/mvebu_armada-37xx/board.c
View File

@ -123,7 +123,7 @@ int board_ahci_enable(void)
}
/* Board specific xHCI enable code */
int board_xhci_enable(void)
int board_xhci_enable(fdt_addr_t base)
{
struct udevice *dev;
int ret;

2
board/Marvell/mvebu_armada-8k/board.c
View File

@ -95,7 +95,7 @@ int board_xhci_config(void)
return 0;
}
int board_xhci_enable(void)
int board_xhci_enable(fdt_addr_t base)
{
struct udevice *dev;
int ret;

6
configs/clearfog_defconfig
View File

@ -43,5 +43,9 @@ CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_MVEBU=y
CONFIG_USB_STORAGE=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y

1
configs/mvebu_db_armada8k_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y

1
configs/mvebu_mcbin-88f8040_defconfig
View File

@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MVEBU_ARMADA_8K=y
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y

1
configs/theadorable_debug_defconfig
View File

@ -26,7 +26,6 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y

4
drivers/pci/pci_mvebu.c
View File

@ -82,11 +82,11 @@ struct mvebu_pcie {
/*
* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped
* into SoCs address space. Each controller will map 32M of MEM
* into SoCs address space. Each controller will map 128M of MEM
* and 64K of I/O space when registered.
*/
static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
#define PCIE_MEM_SIZE (32 << 20)
#define PCIE_MEM_SIZE (128 << 20)
#if defined(CONFIG_ARMADA_38X)
#define PCIE_BASE(if) \

5
drivers/usb/host/xhci-mvebu.c
View File

@ -35,7 +35,7 @@ struct mvebu_xhci {
* Dummy implementation that can be overwritten by a board
* specific function
*/
__weak int board_xhci_enable(void)
__weak int board_xhci_enable(fdt_addr_t base)
{
return 0;
}
@ -62,7 +62,7 @@ static int xhci_usb_probe(struct udevice *dev)
}
/* Enable USB xHCI (VBUS, reset etc) in board specific code */
board_xhci_enable();
board_xhci_enable(devfdt_get_addr_index(dev, 1));
return xhci_register(dev, ctx->hcd, hcor);
}
@ -85,6 +85,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
static const struct udevice_id xhci_usb_ids[] = {
{ .compatible = "marvell,armada3700-xhci" },
{ .compatible = "marvell,armada-380-xhci" },
{ .compatible = "marvell,armada-8k-xhci" },
{ }
};

4
include/configs/clearfog.h
View File

@ -33,9 +33,7 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SF_DEFAULT_BUS 1
/*
* SDIO/MMC Card Configuration