arm: mach-snapdragon: pinctrl: clarify gpio disable bit
The TLMM_GPIO_ENABLE bit is actually use to disable the GPIO. change it to TLMM_GPIO_DISABLE so it's clearer. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
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@ -22,7 +22,7 @@ struct msm_pinctrl_priv {
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#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
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#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
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#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
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#define TLMM_GPIO_ENABLE BIT(9)
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#define TLMM_GPIO_DISABLE BIT(9)
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static const struct pinconf_param msm_conf_params[] = {
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{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 },
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@ -74,7 +74,7 @@ static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
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struct msm_pinctrl_priv *priv = dev_get_priv(dev);
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clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
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TLMM_FUNC_SEL_MASK | TLMM_GPIO_ENABLE,
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TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
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priv->data->get_function_mux(func_selector) << 2);
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return 0;
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}
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