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Merge git://git.denx.de/u-boot-sunxi

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This commit is contained in:
Tom Rini 2018-05-09 12:58:06 -04:00
commit e8f80a5a58
14 changed files with 748 additions and 171 deletions
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15
arch/arm/dts/Makefile
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@ -349,25 +349,28 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dts
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
sun8i-h3-orangepi-pc.dtb \
sun8i-h3-orangepi-pc-plus.dtb \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-m1-plus.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb
sun8i-h3-orangepi-plus2e.dtb
dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \

13
arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
#include "sunxi-libretech-all-h3-cc.dtsi"
/ {
model = "Libre Computer Board ALL-H3-CC H5";
compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
};

13
arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-libretech-all-h3-cc.dtsi"
/ {
model = "Libre Computer Board ALL-H3-CC H2+";
compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus";
};

163
arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
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@ -5,170 +5,9 @@
/dts-v1/;
#include "sun8i-h3.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "sunxi-libretech-all-h3-cc.dtsi"
/ {
model = "Libre Computer Board ALL-H3-CC H3";
compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr_led {
label = "librecomputer:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
status_led {
label = "librecomputer:blue:status";
gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
};
};
gpio_keys {
compatible = "gpio-keys";
power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
reg_vcc1v2: vcc1v2 {
compatible = "regulator-fixed";
regulator-name = "vcc1v2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-active-high;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_vcc5v0>;
};
/* This represents the board's 5V input */
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_vcc_dram: vcc-dram {
compatible = "regulator-fixed";
regulator-name = "vcc-dram";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
enable-active-high;
};
reg_vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc-io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc3v3>;
gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
};
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-fixed";
regulator-name = "vdd-cpux";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-active-high;
};
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc_io>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
/* VBUS on USB ports are always on */
usb0_vbus-supply = <&reg_vcc5v0>;
usb1_vbus-supply = <&reg_vcc5v0>;
usb2_vbus-supply = <&reg_vcc5v0>;
usb3_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

43
arch/arm/dts/sun8i-r40.dtsi
View File

@ -43,6 +43,8 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-r40-ccu.h>
#include <dt-bindings/reset/sun8i-r40-ccu.h>
/ {
#address-cells = <1>;
@ -114,6 +116,39 @@
#size-cells = <1>;
ranges;
nmi_intc: interrupt-controller@1c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x01c00030 0x0c>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun8i-r40-mmc",
"allwinner,sun50i-a64-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
clock-names = "ahb", "mmc";
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
pinctrl-0 = <&mmc0_pins>;
pinctrl-names = "default";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-r40-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
pio: pinctrl@1c20800 {
compatible = "allwinner,sun8i-r40-pinctrl";
reg = <0x01c20800 0x400>;
@ -132,6 +167,14 @@
bias-pull-up;
};
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
bias-pull-up;
};
uart0_pb_pins: uart0_pb_pins {
pins = "PB22", "PB23";
function = "uart0";

132
arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts Normal file
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@ -0,0 +1,132 @@
/*
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun8i-r40.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Banana Pi M2 Berry";
compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&i2c0 {
status = "okay";
axp22x: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp22x.dtsi"
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-name = "avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-3v0";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-sys";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};

168
arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi Normal file
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@ -0,0 +1,168 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr_led {
label = "librecomputer:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
status_led {
label = "librecomputer:blue:status";
gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
};
};
gpio_keys {
compatible = "gpio-keys";
power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
reg_vcc1v2: vcc1v2 {
compatible = "regulator-fixed";
regulator-name = "vcc1v2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-active-high;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_vcc5v0>;
};
/* This represents the board's 5V input */
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_vcc_dram: vcc-dram {
compatible = "regulator-fixed";
regulator-name = "vcc-dram";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
enable-active-high;
};
reg_vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc-io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc3v3>;
gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
};
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-fixed";
regulator-name = "vdd-cpux";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&reg_vcc5v0>;
gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
enable-active-high;
};
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
status = "okay";
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc_io>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
/* VBUS on USB ports are always on */
usb0_vbus-supply = <&reg_vcc5v0>;
usb1_vbus-supply = <&reg_vcc5v0>;
usb2_vbus-supply = <&reg_vcc5v0>;
usb3_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

9
board/sunxi/MAINTAINERS
View File

@ -126,6 +126,11 @@ M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/bananapi_m1_plus_defconfig
BANANAPI M2 BERRY
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/bananapi_m2_berry_defconfig
BANANAPI M2 ULTRA BOARD
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
@ -266,10 +271,12 @@ M: Siarhei Siamashka <siarhei.siamashka@gmail.com>
S: Maintained
F: configs/MSI_Primo81_defconfig
LIBRETECH ALL-H3-CC H3 BOARD
LIBRETECH ALL-H3-CC BOARDS
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
F: configs/libretech_all_h3_cc_h2_plus_defconfig
F: configs/libretech_all_h3_cc_h3_defconfig
F: configs/libretech_all_h3_cc_h5_defconfig
NANOPI-M1 BOARD
M: Mylène Josserand <mylene.josserand@free-electrons.com>

14
configs/bananapi_m2_berry_defconfig Normal file
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@ -0,0 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL=y
CONFIG_MACH_SUN8I_R40=y
CONFIG_DRAM_CLK=576
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_AXP_DLDO4_VOLT=2500
CONFIG_AXP_ELDO3_VOLT=1200

15
configs/libretech_all_h3_cc_h2_plus_defconfig Normal file
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@ -0,0 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL=y
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

2
configs/libretech_all_h3_cc_h3_defconfig
View File

@ -5,10 +5,8 @@ CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_R_I2C_ENABLE=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set

15
configs/libretech_all_h3_cc_h5_defconfig Normal file
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@ -0,0 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL=y
CONFIG_MACH_SUN50I_H5=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

187
include/dt-bindings/clock/sun8i-r40-ccu.h Normal file
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@ -0,0 +1,187 @@
/*
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_
#define _DT_BINDINGS_CLK_SUN8I_R40_H_
#define CLK_CPU 24
#define CLK_BUS_MIPI_DSI 29
#define CLK_BUS_CE 30
#define CLK_BUS_DMA 31
#define CLK_BUS_MMC0 32
#define CLK_BUS_MMC1 33
#define CLK_BUS_MMC2 34
#define CLK_BUS_MMC3 35
#define CLK_BUS_NAND 36
#define CLK_BUS_DRAM 37
#define CLK_BUS_EMAC 38
#define CLK_BUS_TS 39
#define CLK_BUS_HSTIMER 40
#define CLK_BUS_SPI0 41
#define CLK_BUS_SPI1 42
#define CLK_BUS_SPI2 43
#define CLK_BUS_SPI3 44
#define CLK_BUS_SATA 45
#define CLK_BUS_OTG 46
#define CLK_BUS_EHCI0 47
#define CLK_BUS_EHCI1 48
#define CLK_BUS_EHCI2 49
#define CLK_BUS_OHCI0 50
#define CLK_BUS_OHCI1 51
#define CLK_BUS_OHCI2 52
#define CLK_BUS_VE 53
#define CLK_BUS_MP 54
#define CLK_BUS_DEINTERLACE 55
#define CLK_BUS_CSI0 56
#define CLK_BUS_CSI1 57
#define CLK_BUS_HDMI1 58
#define CLK_BUS_HDMI0 59
#define CLK_BUS_DE 60
#define CLK_BUS_TVE0 61
#define CLK_BUS_TVE1 62
#define CLK_BUS_TVE_TOP 63
#define CLK_BUS_GMAC 64
#define CLK_BUS_GPU 65
#define CLK_BUS_TVD0 66
#define CLK_BUS_TVD1 67
#define CLK_BUS_TVD2 68
#define CLK_BUS_TVD3 69
#define CLK_BUS_TVD_TOP 70
#define CLK_BUS_TCON_LCD0 71
#define CLK_BUS_TCON_LCD1 72
#define CLK_BUS_TCON_TV0 73
#define CLK_BUS_TCON_TV1 74
#define CLK_BUS_TCON_TOP 75
#define CLK_BUS_CODEC 76
#define CLK_BUS_SPDIF 77
#define CLK_BUS_AC97 78
#define CLK_BUS_PIO 79
#define CLK_BUS_IR0 80
#define CLK_BUS_IR1 81
#define CLK_BUS_THS 82
#define CLK_BUS_KEYPAD 83
#define CLK_BUS_I2S0 84
#define CLK_BUS_I2S1 85
#define CLK_BUS_I2S2 86
#define CLK_BUS_I2C0 87
#define CLK_BUS_I2C1 88
#define CLK_BUS_I2C2 89
#define CLK_BUS_I2C3 90
#define CLK_BUS_CAN 91
#define CLK_BUS_SCR 92
#define CLK_BUS_PS20 93
#define CLK_BUS_PS21 94
#define CLK_BUS_I2C4 95
#define CLK_BUS_UART0 96
#define CLK_BUS_UART1 97
#define CLK_BUS_UART2 98
#define CLK_BUS_UART3 99
#define CLK_BUS_UART4 100
#define CLK_BUS_UART5 101
#define CLK_BUS_UART6 102
#define CLK_BUS_UART7 103
#define CLK_BUS_DBG 104
#define CLK_THS 105
#define CLK_NAND 106
#define CLK_MMC0 107
#define CLK_MMC1 108
#define CLK_MMC2 109
#define CLK_MMC3 110
#define CLK_TS 111
#define CLK_CE 112
#define CLK_SPI0 113
#define CLK_SPI1 114
#define CLK_SPI2 115
#define CLK_SPI3 116
#define CLK_I2S0 117
#define CLK_I2S1 118
#define CLK_I2S2 119
#define CLK_AC97 120
#define CLK_SPDIF 121
#define CLK_KEYPAD 122
#define CLK_SATA 123
#define CLK_USB_PHY0 124
#define CLK_USB_PHY1 125
#define CLK_USB_PHY2 126
#define CLK_USB_OHCI0 127
#define CLK_USB_OHCI1 128
#define CLK_USB_OHCI2 129
#define CLK_IR0 130
#define CLK_IR1 131
#define CLK_DRAM_VE 133
#define CLK_DRAM_CSI0 134
#define CLK_DRAM_CSI1 135
#define CLK_DRAM_TS 136
#define CLK_DRAM_TVD 137
#define CLK_DRAM_MP 138
#define CLK_DRAM_DEINTERLACE 139
#define CLK_DE 140
#define CLK_MP 141
#define CLK_TCON_LCD0 142
#define CLK_TCON_LCD1 143
#define CLK_TCON_TV0 144
#define CLK_TCON_TV1 145
#define CLK_DEINTERLACE 146
#define CLK_CSI1_MCLK 147
#define CLK_CSI_SCLK 148
#define CLK_CSI0_MCLK 149
#define CLK_VE 150
#define CLK_CODEC 151
#define CLK_AVS 152
#define CLK_HDMI 153
#define CLK_HDMI_SLOW 154
#define CLK_DSI_DPHY 156
#define CLK_TVE0 157
#define CLK_TVE1 158
#define CLK_TVD0 159
#define CLK_TVD1 160
#define CLK_TVD2 161
#define CLK_TVD3 162
#define CLK_GPU 163
#define CLK_OUTA 164
#define CLK_OUTB 165
#endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */

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/*
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RST_SUN8I_R40_H_
#define _DT_BINDINGS_RST_SUN8I_R40_H_
#define RST_USB_PHY0 0
#define RST_USB_PHY1 1
#define RST_USB_PHY2 2
#define RST_DRAM 3
#define RST_MBUS 4
#define RST_BUS_MIPI_DSI 5
#define RST_BUS_CE 6
#define RST_BUS_DMA 7
#define RST_BUS_MMC0 8
#define RST_BUS_MMC1 9
#define RST_BUS_MMC2 10
#define RST_BUS_MMC3 11
#define RST_BUS_NAND 12
#define RST_BUS_DRAM 13
#define RST_BUS_EMAC 14
#define RST_BUS_TS 15
#define RST_BUS_HSTIMER 16
#define RST_BUS_SPI0 17
#define RST_BUS_SPI1 18
#define RST_BUS_SPI2 19
#define RST_BUS_SPI3 20
#define RST_BUS_SATA 21
#define RST_BUS_OTG 22
#define RST_BUS_EHCI0 23
#define RST_BUS_EHCI1 24
#define RST_BUS_EHCI2 25
#define RST_BUS_OHCI0 26
#define RST_BUS_OHCI1 27
#define RST_BUS_OHCI2 28
#define RST_BUS_VE 29
#define RST_BUS_MP 30
#define RST_BUS_DEINTERLACE 31
#define RST_BUS_CSI0 32
#define RST_BUS_CSI1 33
#define RST_BUS_HDMI0 34
#define RST_BUS_HDMI1 35
#define RST_BUS_DE 36
#define RST_BUS_TVE0 37
#define RST_BUS_TVE1 38
#define RST_BUS_TVE_TOP 39
#define RST_BUS_GMAC 40
#define RST_BUS_GPU 41
#define RST_BUS_TVD0 42
#define RST_BUS_TVD1 43
#define RST_BUS_TVD2 44
#define RST_BUS_TVD3 45
#define RST_BUS_TVD_TOP 46
#define RST_BUS_TCON_LCD0 47
#define RST_BUS_TCON_LCD1 48
#define RST_BUS_TCON_TV0 49
#define RST_BUS_TCON_TV1 50
#define RST_BUS_TCON_TOP 51
#define RST_BUS_DBG 52
#define RST_BUS_LVDS 53
#define RST_BUS_CODEC 54
#define RST_BUS_SPDIF 55
#define RST_BUS_AC97 56
#define RST_BUS_IR0 57
#define RST_BUS_IR1 58
#define RST_BUS_THS 59
#define RST_BUS_KEYPAD 60
#define RST_BUS_I2S0 61
#define RST_BUS_I2S1 62
#define RST_BUS_I2S2 63
#define RST_BUS_I2C0 64
#define RST_BUS_I2C1 65
#define RST_BUS_I2C2 66
#define RST_BUS_I2C3 67
#define RST_BUS_CAN 68
#define RST_BUS_SCR 69
#define RST_BUS_PS20 70
#define RST_BUS_PS21 71
#define RST_BUS_I2C4 72
#define RST_BUS_UART0 73
#define RST_BUS_UART1 74
#define RST_BUS_UART2 75
#define RST_BUS_UART3 76
#define RST_BUS_UART4 77
#define RST_BUS_UART5 78
#define RST_BUS_UART6 79
#define RST_BUS_UART7 80
#endif /* _DT_BINDINGS_RST_SUN8I_R40_H_ */