dm: ppc: T4240: add i2c DM support
This supports i2c DM for SoC T4240 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
parent
1321aef8cd
commit
e6bd72f880
@ -3,7 +3,7 @@
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* T4240 Silicon/SoC Device Tree Source (pre include)
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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* Copyright 2019 NXP
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* Copyright 2019-2020 NXP
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*/
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/dts-v1/;
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@ -125,6 +125,9 @@
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reg = <0x114000 0x1000>;
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clock-frequency = <0>;
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};
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/include/ "qoriq-i2c-0.dtsi"
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/include/ "qoriq-i2c-1.dtsi"
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};
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pcie@ffe240000 {
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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*/
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#include "vsc3316_3308.h"
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@ -32,7 +33,22 @@ int vsc_if_enable(unsigned int vsc_addr)
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/* enable 2-wire Serial InterFace (I2C) */
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data = 0x02;
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#ifdef CONFIG_DM_I2C
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int ret, bus_num = 0;
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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return dm_i2c_write(dev, INTERFACE_MODE_REG, &data, 1);
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#else
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return i2c_write(vsc_addr, INTERFACE_MODE_REG, 1, &data, 1);
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#endif
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}
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int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
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@ -45,6 +61,66 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
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debug("VSC:Initializing VSC3316 at I2C address 0x%2x"
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" for Tx\n", vsc_addr);
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#ifdef CONFIG_DM_I2C
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int bus_num = 0;
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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vsc_addr);
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return ret;
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}
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if (rev_id != 0xab) {
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printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
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vsc_addr);
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return -ENODEV;
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}
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ret = vsc_if_enable(vsc_addr);
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if (ret) {
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printf("VSC:0x%x could not configured for 2-wire I/F.\n",
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vsc_addr);
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return ret;
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}
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/* config connections - page 0x00 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
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/* Making crosspoint connections, by connecting required
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* input to output
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*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
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/* input state - page 0x13 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
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/* Configuring the required input of the switch */
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][0], 0x80);
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/* Setting Global Input LOS threshold value */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60);
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/* config output mode - page 0x23 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
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/* Turn ON the Output driver correspond to required output*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], 0);
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/* configure global core control register, Turn on Global core power */
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dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
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#else
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ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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@ -90,6 +166,7 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
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/* configure global core control register, Turn on Global core power */
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i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
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#endif
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vsc_wp_config(vsc_addr);
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@ -107,6 +184,105 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],
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debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n",
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vsc_addr);
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#ifdef CONFIG_DM_I2C
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int bus_num = 0;
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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vsc_addr);
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return ret;
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}
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if (rev_id != 0xab) {
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printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
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vsc_addr);
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return -ENODEV;
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}
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ret = vsc_if_enable(vsc_addr);
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if (ret) {
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printf("VSC:0x%x could not configured for 2-wire I/F.\n",
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vsc_addr);
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return ret;
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}
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/* config connections - page 0x00 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
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/* Configure Global Input ISE */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0);
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dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0);
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/* Configure Tx/Rx Global Output PE1 */
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dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE1, 0);
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/* Configure Tx/Rx Global Output PE2 */
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dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE2, 0);
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/* Configure Tx/Rx Global Input GAIN */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_GAIN, 0x3F);
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/* Setting Global Input LOS threshold value */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0xE0);
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/* Setting Global output termination */
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dm_i2c_reg_write(dev, GLOBAL_OUTPUT_TERMINATION, 0);
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/* Configure Tx/Rx Global Output level */
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if (vsc_addr == VSC3308_TX_ADDRESS)
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dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 4);
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else
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dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 2);
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/* Making crosspoint connections, by connecting required
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* input to output
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*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
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/* input state - page 0x13 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
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/* Turning off all the required input of the switch */
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for (i = 0; i < num_con; i++)
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dm_i2c_reg_write(dev, con_arr[i][0], 1);
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/* only turn on specific Tx/Rx requested by the XFI erratum */
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if (vsc_addr == VSC3308_TX_ADDRESS) {
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dm_i2c_reg_write(dev, 2, 0);
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dm_i2c_reg_write(dev, 3, 0);
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} else {
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dm_i2c_reg_write(dev, 0, 0);
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dm_i2c_reg_write(dev, 1, 0);
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}
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/* config output mode - page 0x23 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
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/* Turn off the Output driver correspond to required output*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], 1);
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/* only turn on specific Tx/Rx requested by the XFI erratum */
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if (vsc_addr == VSC3308_TX_ADDRESS) {
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dm_i2c_reg_write(dev, 0, 0);
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dm_i2c_reg_write(dev, 1, 0);
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} else {
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dm_i2c_reg_write(dev, 3, 0);
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dm_i2c_reg_write(dev, 4, 0);
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}
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/* configure global core control register, Turn on Global core power */
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dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
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#else
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ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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@ -192,7 +368,7 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],
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/* configure global core control register, Turn on Global core power */
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i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
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#endif
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vsc_wp_config(vsc_addr);
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return 0;
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@ -208,7 +384,69 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],
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debug("VSC:Initializing VSC3308 at I2C address 0x%x"
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" for Tx\n", vsc_addr);
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#ifdef CONFIG_DM_I2C
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int bus_num = 0;
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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vsc_addr);
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return ret;
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}
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if (rev_id != 0xab) {
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printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
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vsc_addr);
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return -ENODEV;
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}
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ret = vsc_if_enable(vsc_addr);
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if (ret) {
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printf("VSC:0x%x could not configured for 2-wire I/F.\n",
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vsc_addr);
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return ret;
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}
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/* config connections - page 0x00 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
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/* Making crosspoint connections, by connecting required
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* input to output
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*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
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/*Configure Global Input ISE and gain */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0x12);
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dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0x12);
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/* input state - page 0x13 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
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/* Turning ON the required input of the switch */
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][0], 0);
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/* Setting Global Input LOS threshold value */
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dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60);
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/* config output mode - page 0x23 */
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dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
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/* Turn ON the Output driver correspond to required output*/
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for (i = 0; i < num_con ; i++)
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dm_i2c_reg_write(dev, con_arr[i][1], 0);
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/* configure global core control register, Turn on Global core power */
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dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
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#else
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ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
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if (ret < 0) {
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printf("VSC:0x%x could not read REV_ID from device.\n",
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@ -258,7 +496,7 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],
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/* configure global core control register, Turn on Global core power */
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i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
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#endif
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vsc_wp_config(vsc_addr);
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return 0;
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@ -270,6 +508,22 @@ void vsc_wp_config(unsigned int vsc_addr)
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/* For new crosspoint configuration to occur, WP bit of
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* CORE_CONFIG_REG should be set 1 and then reset to 0 */
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#ifdef CONFIG_DM_I2C
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int ret, bus_num = 0;
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return;
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}
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dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x01);
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dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x0);
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#else
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i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x01);
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i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x0);
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#endif
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}
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2009-2012 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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*/
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#include <common.h>
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@ -91,11 +92,25 @@ int checkboard(void)
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return 0;
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}
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int select_i2c_ch_pca9547(u8 ch)
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int select_i2c_ch_pca9547(u8 ch, int bus_num)
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{
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int ret;
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#ifdef CONFIG_DM_I2C
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_write(dev, 0, &ch, 1);
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#else
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ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
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#endif
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if (ret) {
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puts("PCA: failed to select proper channel\n");
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return ret;
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@ -115,10 +130,28 @@ static inline int read_voltage(void)
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{
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int i, ret, voltage_read = 0;
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u16 vol_mon;
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#ifdef CONFIG_DM_I2C
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struct udevice *dev;
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int bus_num = 0;
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#endif
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for (i = 0; i < NUM_READINGS; i++) {
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#ifdef CONFIG_DM_I2C
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ret = i2c_get_chip_for_busnum(bus_num, I2C_VOL_MONITOR_ADDR,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_read(dev,
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I2C_VOL_MONITOR_BUS_V_OFFSET,
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(void *)&vol_mon, 2);
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#else
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ret = i2c_read(I2C_VOL_MONITOR_ADDR,
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I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2);
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#endif
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if (ret) {
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printf("VID: failed to read core voltage\n");
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return ret;
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@ -250,7 +283,7 @@ static int adjust_vdd(ulong vdd_override)
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unsigned voltage;
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};
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ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR);
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ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR, 0);
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if (ret) {
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debug("VID: I2c failed to switch channel\n");
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ret = -1;
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@ -348,7 +381,7 @@ int config_frontside_crossbar_vsc3316(void)
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u32 srds_prtcl_s1, srds_prtcl_s2;
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int ret;
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ret = select_i2c_ch_pca9547(I2C_MUX_CH_VSC3316_FS);
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ret = select_i2c_ch_pca9547(I2C_MUX_CH_VSC3316_FS, 0);
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if (ret)
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return ret;
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@ -567,7 +600,7 @@ int board_early_init_r(void)
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/* Configure board SERDES ports crossbar */
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config_frontside_crossbar_vsc3316();
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config_backside_crossbar_mux();
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -732,11 +765,11 @@ void board_detail(void)
|
||||
}
|
||||
|
||||
/* Voltage secion */
|
||||
if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR)) {
|
||||
if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR, 0)) {
|
||||
vdd = read_voltage();
|
||||
if (vdd > 0)
|
||||
printf("Core voltage= %d mV\n", vdd);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
}
|
||||
|
||||
printf("XVDD = 1.%d V\n", ((brdcfg[8] & 0xf) - 4) * 5 + 25);
|
||||
|
@ -280,6 +280,19 @@ unsigned long get_board_ddr_clk(void);
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#ifndef CONFIG_DM_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#else
|
||||
#undef CONFIG_SYS_I2C
|
||||
#undef CONFIG_SYS_FSL_I2C2_OFFSET
|
||||
#undef CONFIG_SYS_FSL_I2C2_SLAVE
|
||||
#undef CONFIG_SYS_FSL_I2C2_SPEED
|
||||
#undef CONFIG_SYS_FSL_I2C_SLAVE
|
||||
#undef CONFIG_SYS_FSL_I2C_SPEED
|
||||
#undef CONFIG_SYS_FSL_I2C_OFFSET
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_I2C_FSL
|
||||
#define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */
|
||||
#define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */
|
||||
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
|
||||
|
@ -1,6 +1,7 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright 2014 Freescale Semiconductor, Inc.
|
||||
* Copyright 2020 NXP
|
||||
*/
|
||||
|
||||
/*
|
||||
@ -159,12 +160,18 @@
|
||||
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
|
||||
|
||||
/* I2C */
|
||||
#ifndef CONFIG_DM_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_FSL
|
||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
||||
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
||||
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
|
||||
#else
|
||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_I2C_FSL
|
||||
|
||||
/*
|
||||
* General PCI
|
||||
|
Loading…
Reference in New Issue
Block a user