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pmic: Convert pm8916 driver to a generic Qcom PMIC driver

Browse Source 
Since both pm8916.c and pm8916_gpio.c are already supporting multiple
Qcom SoCs, it makes sense to rename these drivers to pmic_qcom.c and
qcom_pmic_gpio.c respectively. Also, these driver can be extended to
support additional functionality if required for other Qcom SoCs.

Along with this import latest DT binding: qcom,spmi-pmic.txt from Linux
kernel and thereby remove pm8916.txt.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
This commit is contained in:
Sumit Garg 2022-08-04 19:57:17 +05:30 committed by Tom Rini
parent 0c1eab6f75
commit e555d4caac
18 changed files with 200 additions and 124 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
configs/dragonboard410c_defconfig
View File

@ -43,7 +43,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x91000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_MSM_GPIO=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_SDHCI=y
@ -52,7 +52,7 @@ CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y
CONFIG_USB=y

4
configs/dragonboard820c_defconfig
View File

@ -36,12 +36,12 @@ CONFIG_ENV_EXT4_INTERFACE="mmc"
CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_CLK=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MSM=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_SERIAL=y
CONFIG_SPMI_MSM=y

4
configs/dragonboard845c_defconfig
View File

@ -20,10 +20,10 @@ CONFIG_CMD_GPIO=y
# CONFIG_NET is not set
CONFIG_CLK=y
CONFIG_MSM_GPIO=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_MSM_GENI_SERIAL=y
CONFIG_SPMI_MSM=y
CONFIG_LMB_MAX_REGIONS=64

4
configs/sandbox64_defconfig
View File

@ -127,7 +127,7 @@ CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
@ -178,7 +178,7 @@ CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_RK8XX=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y

4
configs/sandbox_defconfig
View File

@ -171,7 +171,7 @@ CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_HWSPINLOCK=y
CONFIG_HWSPINLOCK_SANDBOX=y
@ -231,7 +231,7 @@ CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_PMIC_MC34708=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_RK8XX=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y

4
configs/sandbox_flattree_defconfig
View File

@ -100,7 +100,7 @@ CONFIG_DM_DEMO_SHAPE=y
CONFIG_DFU_SF=y
CONFIG_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
@ -153,7 +153,7 @@ CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_PMIC_MC34708=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y
CONFIG_PMIC_S5M8767=y

4
configs/sandbox_noinst_defconfig
View File

@ -126,7 +126,7 @@ CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
CONFIG_SPL_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
@ -176,7 +176,7 @@ CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_PMIC_MC34708=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_RK8XX=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y

4
configs/sandbox_spl_defconfig
View File

@ -127,7 +127,7 @@ CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
CONFIG_SPL_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
@ -179,7 +179,7 @@ CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_PMIC_MC34708=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_RK8XX=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y

4
configs/sandbox_vpl_defconfig
View File

@ -136,7 +136,7 @@ CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
CONFIG_SPL_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_CROS_EC_LDO=y
@ -184,7 +184,7 @@ CONFIG_PMIC_ACT8846=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_PMIC_MC34708=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
CONFIG_PMIC_RK8XX=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_PMIC_SANDBOX=y

4
configs/starqltechn_defconfig
View File

@ -23,10 +23,10 @@ CONFIG_CMD_BMP=y
# CONFIG_DM_STDIO is not set
CONFIG_CLK=y
CONFIG_MSM_GPIO=y
CONFIG_PM8916_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
CONFIG_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_PMIC_QCOM=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_SPMI_MSM=y
CONFIG_DM_VIDEO=y

18
doc/device-tree-bindings/pmic/pm8916.txt
View File

@ -1,18 +0,0 @@
Qualcomm pm8916 PMIC
This PMIC is connected using SPMI bus so should be child of SPMI bus controller.
Required properties:
- compatible: "qcom,spmi-pmic";
- reg: SPMI Slave ID, size (ignored)
- #address-cells: 0x1 (peripheral ID)
- #size-cells: 0x1 (size of peripheral register space)
Example:
pm8916@0 {
compatible = "qcom,spmi-pmic";
reg = <0x0 0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
};

94
doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt Normal file
View File

@ -0,0 +1,94 @@
Qualcomm SPMI PMICs multi-function device bindings
The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084
PMICs. These PMICs use a QPNP scheme through SPMI interface.
QPNP is effectively a partitioning scheme for dividing the SPMI extended
register space up into logical pieces, and set of fixed register
locations/definitions within these regions, with some of these regions
specifically used for interrupt handling.
The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
interfaced to the chip via the SPMI (System Power Management Interface) bus.
Support for multiple independent functions are implemented by splitting the
16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
each. A function can consume one or more of these fixed-size register regions.
Required properties:
- compatible: Should contain one of:
"qcom,pm660",
"qcom,pm660l",
"qcom,pm7325",
"qcom,pm8004",
"qcom,pm8005",
"qcom,pm8019",
"qcom,pm8028",
"qcom,pm8110",
"qcom,pm8150",
"qcom,pm8150b",
"qcom,pm8150c",
"qcom,pm8150l",
"qcom,pm8226",
"qcom,pm8350c",
"qcom,pm8841",
"qcom,pm8901",
"qcom,pm8909",
"qcom,pm8916",
"qcom,pm8941",
"qcom,pm8950",
"qcom,pm8953",
"qcom,pm8994",
"qcom,pm8998",
"qcom,pma8084",
"qcom,pmd9635",
"qcom,pmi8950",
"qcom,pmi8962",
"qcom,pmi8994",
"qcom,pmi8998",
"qcom,pmk8002",
"qcom,pmk8350",
"qcom,pmr735a",
"qcom,smb2351",
or generalized "qcom,spmi-pmic".
- reg: Specifies the SPMI USID slave address for this device.
For more information see:
Documentation/devicetree/bindings/spmi/spmi.yaml
Required properties for peripheral child nodes:
- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name.
Optional properties for peripheral child nodes:
- interrupts: Interrupts are specified as a 4-tuple. For more information
see:
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
- interrupt-names: Corresponding interrupt name to the interrupts property
Each child node of SPMI slave id represents a function of the PMIC. In the
example below the rtc device node represents a peripheral of pm8941
SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
Example:
spmi {
compatible = "qcom,spmi-pmic-arb";
pm8941@0 {
compatible = "qcom,pm8941", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
rtc {
compatible = "qcom,rtc";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "alarm";
};
};
pm8941@1 {
compatible = "qcom,pm8941", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
regulator {
compatible = "qcom,regulator";
regulator-name = "8941_boost";
};
};
};

10
drivers/gpio/Kconfig
View File

@ -303,14 +303,14 @@ config CMD_PCA953X
legacy GPIO interface. Several subcommands are provided which mirror
the standard 'gpio' command. It should use that instead.
config PM8916_GPIO
bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
depends on DM_GPIO && PMIC_PM8916
config QCOM_PMIC_GPIO
bool "Qualcomm generic PMIC GPIO/keypad driver"
depends on DM_GPIO && PMIC_QCOM
help
Support for GPIO pins and power/reset buttons found on
Qualcomm PM8916 PMIC.
Qualcomm SoCs PMIC.
Default name for GPIO bank is "pm8916".
Power and reset buttons are placed in "pm8916_key" bank and
Power and reset buttons are placed in "pwkey_qcom" bank and
have gpio numbers 0 and 1 respectively.
config PCF8575_GPIO

2
drivers/gpio/Makefile
View File

@ -63,7 +63,7 @@ obj-$(CONFIG_OCTEON_GPIO) += octeon_gpio.o
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
obj-$(CONFIG_$(SPL_TPL_)PM8916_GPIO) += pm8916_gpio.o
obj-$(CONFIG_$(SPL_TPL_)QCOM_PMIC_GPIO) += qcom_pmic_gpio.o
obj-$(CONFIG_MT7620_GPIO) += mt7620_gpio.o
obj-$(CONFIG_MT7621_GPIO) += mt7621_gpio.o
obj-$(CONFIG_MSCC_SGPIO) += mscc_sgpio.o

108
drivers/gpio/pm8916_gpio.c → drivers/gpio/qcom_pmic_gpio.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
* Qualcomm generic pmic gpio driver
*
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
@ -19,7 +19,7 @@
/* Register maps */
/* Type and subtype are shared for all pm8916 peripherals */
/* Type and subtype are shared for all PMIC peripherals */
#define REG_TYPE 0x4
#define REG_SUBTYPE 0x5
@ -47,14 +47,14 @@
#define REG_EN_CTL 0x46
#define REG_EN_CTL_ENABLE (1 << 7)
struct pm8916_gpio_bank {
struct qcom_gpio_bank {
uint32_t pid; /* Peripheral ID on SPMI bus */
};
static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset,
bool input, int value)
static int qcom_gpio_set_direction(struct udevice *dev, unsigned offset,
bool input, int value)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
int ret;
@ -101,20 +101,20 @@ static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset,
REG_EN_CTL_ENABLE);
}
static int pm8916_gpio_direction_input(struct udevice *dev, unsigned offset)
static int qcom_gpio_direction_input(struct udevice *dev, unsigned offset)
{
return pm8916_gpio_set_direction(dev, offset, true, 0);
return qcom_gpio_set_direction(dev, offset, true, 0);
}
static int pm8916_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
static int qcom_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
return pm8916_gpio_set_direction(dev, offset, false, value);
return qcom_gpio_set_direction(dev, offset, false, value);
}
static int pm8916_gpio_get_function(struct udevice *dev, unsigned offset)
static int qcom_gpio_get_function(struct udevice *dev, unsigned offset)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
int reg;
@ -134,9 +134,9 @@ static int pm8916_gpio_get_function(struct udevice *dev, unsigned offset)
}
}
static int pm8916_gpio_get_value(struct udevice *dev, unsigned offset)
static int qcom_gpio_get_value(struct udevice *dev, unsigned offset)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
int reg;
@ -147,10 +147,10 @@ static int pm8916_gpio_get_value(struct udevice *dev, unsigned offset)
return !!(reg & REG_STATUS_VAL_MASK);
}
static int pm8916_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
static int qcom_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
/* Set the output value of the gpio */
@ -158,17 +158,17 @@ static int pm8916_gpio_set_value(struct udevice *dev, unsigned offset,
REG_CTL_OUTPUT_MASK, !!value);
}
static const struct dm_gpio_ops pm8916_gpio_ops = {
.direction_input = pm8916_gpio_direction_input,
.direction_output = pm8916_gpio_direction_output,
.get_value = pm8916_gpio_get_value,
.set_value = pm8916_gpio_set_value,
.get_function = pm8916_gpio_get_function,
static const struct dm_gpio_ops qcom_gpio_ops = {
.direction_input = qcom_gpio_direction_input,
.direction_output = qcom_gpio_direction_output,
.get_value = qcom_gpio_get_value,
.set_value = qcom_gpio_set_value,
.get_function = qcom_gpio_get_function,
};
static int pm8916_gpio_probe(struct udevice *dev)
static int qcom_gpio_probe(struct udevice *dev)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
int reg;
priv->pid = dev_read_addr(dev);
@ -187,33 +187,33 @@ static int pm8916_gpio_probe(struct udevice *dev)
return 0;
}
static int pm8916_gpio_of_to_plat(struct udevice *dev)
static int qcom_gpio_of_to_plat(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0);
uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
if (uc_priv->bank_name == NULL)
uc_priv->bank_name = "pm8916";
uc_priv->bank_name = "qcom_pmic";
return 0;
}
static const struct udevice_id pm8916_gpio_ids[] = {
static const struct udevice_id qcom_gpio_ids[] = {
{ .compatible = "qcom,pm8916-gpio" },
{ .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
{ .compatible = "qcom,pm8998-gpio" },
{ }
};
U_BOOT_DRIVER(gpio_pm8916) = {
.name = "gpio_pm8916",
U_BOOT_DRIVER(qcom_pmic_gpio) = {
.name = "qcom_pmic_gpio",
.id = UCLASS_GPIO,
.of_match = pm8916_gpio_ids,
.of_to_plat = pm8916_gpio_of_to_plat,
.probe = pm8916_gpio_probe,
.ops = &pm8916_gpio_ops,
.priv_auto = sizeof(struct pm8916_gpio_bank),
.of_match = qcom_gpio_ids,
.of_to_plat = qcom_gpio_of_to_plat,
.probe = qcom_gpio_probe,
.ops = &qcom_gpio_ops,
.priv_auto = sizeof(struct qcom_gpio_bank),
};
@ -222,14 +222,14 @@ U_BOOT_DRIVER(gpio_pm8916) = {
#define KPDPWR_ON_INT_BIT 0
#define RESIN_ON_INT_BIT 1
static int pm8941_pwrkey_get_function(struct udevice *dev, unsigned offset)
static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset)
{
return GPIOF_INPUT;
}
static int pm8941_pwrkey_get_value(struct udevice *dev, unsigned offset)
static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS);
@ -247,14 +247,14 @@ static int pm8941_pwrkey_get_value(struct udevice *dev, unsigned offset)
}
}
static const struct dm_gpio_ops pm8941_pwrkey_ops = {
.get_value = pm8941_pwrkey_get_value,
.get_function = pm8941_pwrkey_get_function,
static const struct dm_gpio_ops qcom_pwrkey_ops = {
.get_value = qcom_pwrkey_get_value,
.get_function = qcom_pwrkey_get_function,
};
static int pm8941_pwrkey_probe(struct udevice *dev)
static int qcom_pwrkey_probe(struct udevice *dev)
{
struct pm8916_gpio_bank *priv = dev_get_priv(dev);
struct qcom_gpio_bank *priv = dev_get_priv(dev);
int reg;
priv->pid = dev_read_addr(dev);
@ -273,31 +273,31 @@ static int pm8941_pwrkey_probe(struct udevice *dev)
return 0;
}
static int pm8941_pwrkey_of_to_plat(struct udevice *dev)
static int qcom_pwrkey_of_to_plat(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
uc_priv->gpio_count = 2;
uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
if (uc_priv->bank_name == NULL)
uc_priv->bank_name = "pm8916_key";
uc_priv->bank_name = "pwkey_qcom";
return 0;
}
static const struct udevice_id pm8941_pwrkey_ids[] = {
static const struct udevice_id qcom_pwrkey_ids[] = {
{ .compatible = "qcom,pm8916-pwrkey" },
{ .compatible = "qcom,pm8994-pwrkey" },
{ .compatible = "qcom,pm8998-pwrkey" },
{ }
};
U_BOOT_DRIVER(pwrkey_pm89xx) = {
.name = "pwrkey_pm89xx",
U_BOOT_DRIVER(pwrkey_qcom) = {
.name = "pwrkey_qcom",
.id = UCLASS_GPIO,
.of_match = pm8941_pwrkey_ids,
.of_to_plat = pm8941_pwrkey_of_to_plat,
.probe = pm8941_pwrkey_probe,
.ops = &pm8941_pwrkey_ops,
.priv_auto = sizeof(struct pm8916_gpio_bank),
.of_match = qcom_pwrkey_ids,
.of_to_plat = qcom_pwrkey_of_to_plat,
.probe = qcom_pwrkey_probe,
.ops = &qcom_pwrkey_ops,
.priv_auto = sizeof(struct qcom_gpio_bank),
};

8
drivers/power/pmic/Kconfig
View File

@ -216,10 +216,10 @@ config PMIC_MAX8997
- MUIC
- Others
config PMIC_PM8916
bool "Enable Driver Model for Qualcomm PM8916 PMIC"
config PMIC_QCOM
bool "Enable Driver Model for Qualcomm generic PMIC"
---help---
The PM8916 is a PMIC connected to one (or several) processors
The Qcom PMIC is connected to one (or several) processors
with SPMI bus. It has 2 slaves with several peripherals:
- 18x LDO
- 4x GPIO
@ -229,7 +229,7 @@ config PMIC_PM8916
- Vibrator drivers
- Others
Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt
Driver binding info: doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt
config PMIC_RK8XX
bool "Enable support for Rockchip PMIC RK8XX"

2
drivers/power/pmic/Makefile
View File

@ -20,7 +20,7 @@ obj-$(CONFIG_PMIC_ACT8846) += act8846.o
obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o
obj-$(CONFIG_$(SPL_)PMIC_AXP) += axp.o
obj-$(CONFIG_PMIC_MAX8997) += max8997.o
obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_QCOM) += pmic_qcom.o
obj-$(CONFIG_$(SPL_TPL_)PMIC_RK8XX) += rk8xx.o
obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o

42
drivers/power/pmic/pm8916.c → drivers/power/pmic/pmic_qcom.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Qualcomm pm8916 pmic driver
* Qualcomm generic pmic driver
*
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
@ -13,19 +13,19 @@
#define PID_MASK (0xFF << PID_SHIFT)
#define REG_MASK 0xFF
struct pm8916_priv {
struct pmic_qcom_priv {
uint32_t usid; /* Slave ID on SPMI bus */
};
static int pm8916_reg_count(struct udevice *dev)
static int pmic_qcom_reg_count(struct udevice *dev)
{
return 0xFFFF;
}
static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
int len)
static int pmic_qcom_write(struct udevice *dev, uint reg, const uint8_t *buff,
int len)
{
struct pm8916_priv *priv = dev_get_priv(dev);
struct pmic_qcom_priv *priv = dev_get_priv(dev);
if (len != 1)
return -EINVAL;
@ -35,9 +35,9 @@ static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
*buff);
}
static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
static int pmic_qcom_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
struct pm8916_priv *priv = dev_get_priv(dev);
struct pmic_qcom_priv *priv = dev_get_priv(dev);
int val;
if (len != 1)
@ -52,20 +52,20 @@ static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
return 0;
}
static struct dm_pmic_ops pm8916_ops = {
.reg_count = pm8916_reg_count,
.read = pm8916_read,
.write = pm8916_write,
static struct dm_pmic_ops pmic_qcom_ops = {
.reg_count = pmic_qcom_reg_count,
.read = pmic_qcom_read,
.write = pmic_qcom_write,
};
static const struct udevice_id pm8916_ids[] = {
static const struct udevice_id pmic_qcom_ids[] = {
{ .compatible = "qcom,spmi-pmic" },
{ }
};
static int pm8916_probe(struct udevice *dev)
static int pmic_qcom_probe(struct udevice *dev)
{
struct pm8916_priv *priv = dev_get_priv(dev);
struct pmic_qcom_priv *priv = dev_get_priv(dev);
priv->usid = dev_read_addr(dev);
@ -75,12 +75,12 @@ static int pm8916_probe(struct udevice *dev)
return 0;
}
U_BOOT_DRIVER(pmic_pm8916) = {
.name = "pmic_pm8916",
U_BOOT_DRIVER(pmic_qcom) = {
.name = "pmic_qcom",
.id = UCLASS_PMIC,
.of_match = pm8916_ids,
.of_match = pmic_qcom_ids,
.bind = dm_scan_fdt_dev,
.probe = pm8916_probe,
.ops = &pm8916_ops,
.priv_auto = sizeof(struct pm8916_priv),
.probe = pmic_qcom_probe,
.ops = &pmic_qcom_ops,
.priv_auto = sizeof(struct pmic_qcom_priv),
};