powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs
The liodn for the new PCIE controller included in P5040DS is no longer set through a register in the guts register block but with one in the PCIE register block itself. Update the PCIE CCSR structure to add the new liodn register and add a new dedicated SET_PCI_LIODN_BASE macro that puts the liodn in the correct register. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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@ -94,6 +94,11 @@ extern void fdt_fixup_liodn(void *blob);
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SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
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CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
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#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
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SET_LIODN_ENTRY_1(compat, liodn,\
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offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
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CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
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/* reg nodes for DMA start @ 0x300 */
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#define SET_DMA_LIODN(dmaNum, liodn) \
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SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
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@ -296,7 +296,9 @@ typedef struct ccsr_pcix {
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u32 cfg_addr; /* PCIX Configuration Addr */
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u32 cfg_data; /* PCIX Configuration Data */
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u32 int_ack; /* PCIX IRQ Acknowledge */
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u8 res1[3060];
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u8 res000c[52];
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u32 liodn_base; /* PCIX LIODN base register */
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u8 res0044[3004];
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u32 potar0; /* PCIX Outbound Transaction Addr 0 */
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u32 potear0; /* PCIX Outbound Translation Extended Addr 0 */
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u32 powbar0; /* PCIX Outbound Window Base Addr 0 */
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