i.MX7ULP: Add CPU revision check for B0
Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Peng Fan <peng.fan@nxp.com>
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@ -18,10 +18,13 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
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};
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};
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#endif
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#endif
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#define ROM_VERSION_ADDR 0x80
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u32 get_cpu_rev(void)
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u32 get_cpu_rev(void)
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{
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{
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/* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */
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/* Check the ROM version for cpu revision */
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return (MXC_CPU_MX7ULP << 12) | (1 << 4);
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u32 rom_version = readl((void __iomem *)ROM_VERSION_ADDR);
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return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF);
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}
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}
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#ifdef CONFIG_REVISION_TAG
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#ifdef CONFIG_REVISION_TAG
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