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xilinx: common: Do not save fdt_blob to bss section

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For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2020-09-04 16:21:47 +02:00
parent 6cb402f38e
commit e2572b5544
1 changed files with 1 additions and 1 deletions
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board/xilinx/common/board.c
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@ -44,7 +44,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
void *board_fdt_blob_setup(void)
{
static void *fdt_blob;
void *fdt_blob;
#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;