usb: ohci: enable cache support
Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
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@ -105,21 +105,13 @@ static struct pci_device_id ehci_pci_ids[] = {
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# define m32_swap(x) cpu_to_le32(x)
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#endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
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#ifdef CONFIG_DM_USB
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/*
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* We really should do proper cache flushing everywhere, but for now we only
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* do it for new (driver-model) usb code to avoid regressions.
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*/
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/* We really should do proper cache flushing everywhere */
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#define flush_dcache_buffer(addr, size) \
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flush_dcache_range((unsigned long)(addr), \
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ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
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#define invalidate_dcache_buffer(addr, size) \
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invalidate_dcache_range((unsigned long)(addr), \
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ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN))
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#else
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#define flush_dcache_buffer(addr, size)
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#define invalidate_dcache_buffer(addr, size)
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#endif
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/* Do not use sizeof(ed / td) as our ed / td structs contain extra members */
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#define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16)
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@ -763,12 +755,10 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
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if (((struct ed *)
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m32_swap((unsigned long)ed_p)) == ed) {
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*ed_p = ed->hwNextED;
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#ifdef CONFIG_DM_USB
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aligned_ed_p = (unsigned long)ed_p;
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aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1);
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flush_dcache_range(aligned_ed_p,
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aligned_ed_p + ARCH_DMA_MINALIGN);
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#endif
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break;
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}
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ed_p = &(((struct ed *)
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@ -18,7 +18,7 @@
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# define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
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#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
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#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 16
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#if ARCH_DMA_MINALIGN > 16
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#define ED_ALIGNMENT ARCH_DMA_MINALIGN
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#else
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#define ED_ALIGNMENT 16
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