rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clock
To enable the GMAC on the RK3368, we need to set up the clocking appropriately to generate a tx_clk for the MAC. This adds an implementation that implements the use of the <&ext_gmac> clock (i.e. an external 125MHz clock for RGMII provided by the PHY). This is the clock setup used by the boards currently supported by U-Boot (i.e. Geekbox, Sheep and RK3368-uQ7). This includes the change from commit - rockchip: clk: rk3368: define GMAC_MUX_SEL_EXTCLK Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -89,6 +89,9 @@ enum {
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MCU_CLK_DIV_SHIFT = 0,
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MCU_CLK_DIV_MASK = GENMASK(4, 0),
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/* CLKSEL43_CON */
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GMAC_MUX_SEL_EXTCLK = BIT(8),
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/* CLKSEL51_CON */
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MMC_PLL_SEL_SHIFT = 8,
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MMC_PLL_SEL_MASK = GENMASK(9, 8),
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@ -338,6 +338,19 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
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}
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#endif
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#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
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static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
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ulong clk_id, ulong set_rate)
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{
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/*
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* This models the 'assigned-clock-parents = <&ext_gmac>' from
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* the DTS and switches to the 'ext_gmac' clock parent.
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*/
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rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
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return set_rate;
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}
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#endif
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static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
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@ -356,10 +369,12 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
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ret = rk3368_mmc_set_clk(clk, rate);
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break;
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#endif
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#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
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case SCLK_MAC:
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/* nothing to do, as this is an external clock */
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ret = rate;
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/* select the external clock */
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ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
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break;
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#endif
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default:
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return -ENOENT;
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}
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