dm: mmc: dwmmc: fix the wrong explanation for clock values
This e,g is wrong. Maximum/minimum e.g values are swapped each other. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -256,8 +256,8 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg)
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* @name: Device name (normally dev->name)
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* @buswidth: Bus width (in bits, such as 4 or 8)
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* @caps: Host capabilities (MMC_MODE_...)
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* @max_clk: Maximum supported clock speed in HZ (e.g. 400000)
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* @min_clk: Minimum supported clock speed in HZ (e.g. 150000000)
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* @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
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* @min_clk: Minimum supported clock speed in HZ (e.g. 400000)
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*/
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void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
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uint caps, u32 max_clk, u32 min_clk);
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@ -286,8 +286,8 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
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* This is used when you are not using CONFIG_BLK. Convert your driver over!
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*
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* @host: DWMMC host structure
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* @max_clk: Maximum supported clock speed in HZ (e.g. 400000)
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* @min_clk: Minimum supported clock speed in HZ (e.g. 150000000)
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* @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
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* @min_clk: Minimum supported clock speed in HZ (e.g. 400000)
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* @return 0 if OK, -ve on error
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*/
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int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
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