Armada100: Add SPI support for Marvell gplugD
This patch add SPI driver support for Marvell gplugD Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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@ -45,6 +45,10 @@
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#define FE_CLK_RST 0x1
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#define FE_CLK_ENA 0x8
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/* SSP2 Clock Control */
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#define SSP2_APBCLK 0x01
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#define SSP2_FNCLK 0x02
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/* Register Base Addresses */
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#define ARMD1_DRAM_BASE 0xB0000000
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#define ARMD1_FEC_BASE 0xC0800000
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@ -175,5 +179,20 @@ struct armd1apb1_registers {
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u32 ac97; /*0x084*/
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};
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/*
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* APB2 Clock Reset/Control Registers
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* Refer Datasheet Appendix A.11
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*/
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struct armd1apb2_registers {
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u32 pad1[0x01C - 0x000];
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u32 ssp1_clkrst; /* 0x01C */
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u32 ssp2_clkrst; /* 0x020 */
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u32 pad2[0x04C - 0x020 - 4];
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u32 ssp3_clkrst; /* 0x04C */
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u32 pad3[0x058 - 0x04C - 4];
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u32 ssp4_clkrst; /* 0x058 */
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u32 ssp5_clkrst; /* 0x05C */
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};
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#endif /* CONFIG_ARMADA100 */
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#endif /* _ASM_ARCH_ARMADA100_H */
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@ -83,6 +83,12 @@
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#define MFP101_ETH_MDIO (MFP_REG(0x194) | MFP_AF5 | MFP_DRIVE_MEDIUM)
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#define MFP103_ETH_RXDV (MFP_REG(0x19C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
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/* SPI */
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#define MFP107_SSP2_RXD (MFP_REG(0x1AC) | MFP_AF4 | MFP_DRIVE_MEDIUM)
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#define MFP108_SSP2_TXD (MFP_REG(0x1B0) | MFP_AF4 | MFP_DRIVE_MEDIUM)
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#define MFP110_SSP2_CS (MFP_REG(0x1B8) | MFP_AF0 | MFP_DRIVE_MEDIUM)
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#define MFP111_SSP2_CLK (MFP_REG(0x1BC) | MFP_AF4 | MFP_DRIVE_MEDIUM)
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/* More macros can be defined here... */
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#define MFP_PIN_MAX 117
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@ -72,6 +72,12 @@ int board_early_init_f(void)
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MFP101_ETH_MDIO,
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MFP103_ETH_RXDV,
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/* SSP2 */
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MFP107_SSP2_RXD,
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MFP108_SSP2_TXD,
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MFP110_SSP2_CS,
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MFP111_SSP2_CLK,
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MFP_EOC /*End of configuration*/
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};
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/* configure MFP's */
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@ -81,6 +87,9 @@ int board_early_init_f(void)
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int board_init(void)
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{
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struct armd1apb2_registers *apb2_regs =
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(struct armd1apb2_registers *)ARMD1_APBC2_BASE;
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/* arch number of Board */
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gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD;
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/* adress of boot parameters */
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@ -90,6 +99,9 @@ int board_init(void)
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udelay(10);
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/* Deassert PHY_RST# */
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gpio_set_value(CONFIG_SYS_GPIO_PHY_RST, GPIO_HIGH);
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/* Enable SSP2 clock */
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writel(SSP2_APBCLK | SSP2_FNCLK, &apb2_regs->ssp2_clkrst);
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return 0;
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}
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@ -90,6 +90,11 @@
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/* GPIO Configuration for PHY */
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#define CONFIG_SYS_GPIO_PHY_RST 104 /* GPIO104 */
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/* SPI Support */
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#define CONFIG_ARMADA100_SPI
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#define CONFIG_ENV_SPI_CS 110
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#define CONFIG_SYS_SSP_PORT 2
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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