powerpc/mpc85xx: Remove some dead code
U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Scott Wood
York Sun
parent
96d2bb952b
commit
d87a2ad108
@ -1201,73 +1201,7 @@ ProgramCheck:
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/* No FPU on MPC85xx. This exception is not supposed to happen.
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*/
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STD_EXCEPTION(0x0800, FPUnavailable, UnknownException)
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/*
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* r0 - SYSCALL number
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* r3-... arguments
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*/
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SystemCall:
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addis r11,r0,0 /* get functions table addr */
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ori r11,r11,0 /* Note: this code is patched in trap_init */
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addis r12,r0,0 /* get number of functions */
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ori r12,r12,0
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cmplw 0,r0,r12
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bge 1f
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rlwinm r0,r0,2,0,31 /* fn_addr = fn_tbl[r0] */
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add r11,r11,r0
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lwz r11,0(r11)
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li r20,0xd00-4 /* Get stack pointer */
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lwz r12,0(r20)
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subi r12,r12,12 /* Adjust stack pointer */
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li r0,0xc00+_end_back-SystemCall
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cmplw 0,r0,r12 /* Check stack overflow */
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bgt 1f
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stw r12,0(r20)
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mflr r0
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stw r0,0(r12)
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mfspr r0,SRR0
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stw r0,4(r12)
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mfspr r0,SRR1
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stw r0,8(r12)
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li r12,0xc00+_back-SystemCall
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mtlr r12
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mtspr SRR0,r11
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1: SYNC
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rfi
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_back:
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mfmsr r11 /* Disable interrupts */
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li r12,0
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ori r12,r12,MSR_EE
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andc r11,r11,r12
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SYNC /* Some chip revs need this... */
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mtmsr r11
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SYNC
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li r12,0xd00-4 /* restore regs */
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lwz r12,0(r12)
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lwz r11,0(r12)
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mtlr r11
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lwz r11,4(r12)
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mtspr SRR0,r11
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lwz r11,8(r12)
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mtspr SRR1,r11
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addi r12,r12,12 /* Adjust stack pointer */
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li r20,0xd00-4
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stw r12,0(r20)
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SYNC
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rfi
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_end_back:
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STD_EXCEPTION(0x0900, SystemCall, UnknownException)
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STD_EXCEPTION(0x0a00, Decrementer, timer_interrupt)
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STD_EXCEPTION(0x0b00, IntervalTimer, UnknownException)
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STD_EXCEPTION(0x0c00, WatchdogTimer, UnknownException)
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@ -1334,66 +1268,6 @@ int_return:
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SYNC
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rfi
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crit_return:
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mfmsr r28 /* Disable interrupts */
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li r4,0
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ori r4,r4,MSR_EE
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andc r28,r28,r4
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SYNC /* Some chip revs need this... */
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mtmsr r28
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SYNC
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lwz r2,_CTR(r1)
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lwz r0,_LINK(r1)
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mtctr r2
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mtlr r0
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lwz r2,_XER(r1)
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lwz r0,_CCR(r1)
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mtspr XER,r2
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mtcrf 0xFF,r0
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REST_10GPRS(3, r1)
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REST_10GPRS(13, r1)
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REST_8GPRS(23, r1)
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REST_GPR(31, r1)
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lwz r2,_NIP(r1) /* Restore environment */
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lwz r0,_MSR(r1)
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mtspr SPRN_CSRR0,r2
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mtspr SPRN_CSRR1,r0
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lwz r0,GPR0(r1)
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lwz r2,GPR2(r1)
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lwz r1,GPR1(r1)
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SYNC
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rfci
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mck_return:
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mfmsr r28 /* Disable interrupts */
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li r4,0
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ori r4,r4,MSR_EE
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andc r28,r28,r4
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SYNC /* Some chip revs need this... */
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mtmsr r28
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SYNC
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lwz r2,_CTR(r1)
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lwz r0,_LINK(r1)
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mtctr r2
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mtlr r0
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lwz r2,_XER(r1)
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lwz r0,_CCR(r1)
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mtspr XER,r2
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mtcrf 0xFF,r0
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REST_10GPRS(3, r1)
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REST_10GPRS(13, r1)
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REST_8GPRS(23, r1)
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REST_GPR(31, r1)
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lwz r2,_NIP(r1) /* Restore environment */
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lwz r0,_MSR(r1)
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mtspr SPRN_MCSRR0,r2
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mtspr SPRN_MCSRR1,r0
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lwz r0,GPR0(r1)
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lwz r2,GPR2(r1)
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lwz r1,GPR1(r1)
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SYNC
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rfmci
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/* Cache functions.
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*/
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.globl flush_icache
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@ -1478,11 +1352,6 @@ dcache_status:
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andi. r3,r3,L1CSR0_DCE
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blr
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.globl get_pir
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get_pir:
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mfspr r3,PIR
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blr
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.globl get_pvr
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get_pvr:
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mfspr r3,PVR
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@ -1493,11 +1362,6 @@ get_svr:
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mfspr r3,SVR
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blr
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.globl wr_tcr
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wr_tcr:
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mtspr TCR,r3
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blr
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/*------------------------------------------------------------------------------- */
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/* Function: in8 */
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/* Description: Input 8 bits */
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@ -482,7 +482,6 @@ int testdram(void);
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defined(CONFIG_8xx)
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uint get_immr (uint);
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#endif
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uint get_pir (void);
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#if defined(CONFIG_MPC5xxx)
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uint get_svr (void);
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#endif
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