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GCC-4.x fixes: clean up global data pointer initialization for all boards.

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This commit is contained in:
Wolfgang Denk 2006-03-31 18:32:53 +02:00
parent f6dbbe9864
commit d87080b721
292 changed files with 1133 additions and 1609 deletions
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3
CHANGELOG
View File

@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
* GCC-4.x fixes: clean up global data pointer initialization for all
boards
* Update for Delta board:
- redundant NAND environment
- misc Monahans cleanups (remove dead code etc.)

2
README
View File

@ -3309,6 +3309,8 @@ On ARM, the following registers are used:
==> U-Boot will use R8 to hold a pointer to the global data
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.
Memory Management:
------------------

3
board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
View File

@ -1,6 +1,7 @@
/*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
* (C) Copyright 2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@ -88,8 +89,6 @@ long initdram (int board_type)
void after_reloc (ulong dest_addr, gd_t *gd)
{
/* HJF: DECLARE_GLOBAL_DATA_PTR; */
board_init_r (gd, dest_addr);
}

5
board/MAI/AmigaOneG3SE/articiaS.c
View File

@ -29,6 +29,8 @@
#include "smbus.h"
#include "via686.h"
DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
struct dimm_bank {
@ -82,7 +84,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
{
DECLARE_GLOBAL_DATA_PTR;
int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
uint32 busclock = gd->bus_clk;
uint32 memclock = busclock;
@ -394,8 +395,6 @@ uint32 burst_to_len (uint32 support)
long articiaS_ram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
register uint32 i;
register uint32 value1;
register uint32 value2;

4
board/MAI/AmigaOneG3SE/articiaS_pci.c
View File

@ -26,6 +26,8 @@
#include "memio.h"
#include "articiaS.h"
DECLARE_GLOBAL_DATA_PTR;
#undef ARTICIA_PCI_DEBUG
#ifdef ARTICIA_PCI_DEBUG
@ -493,8 +495,6 @@ pci_dev_t video_dev;
int articiaS_init_vga (void)
{
DECLARE_GLOBAL_DATA_PTR;
extern void shutdown_bios(void);
pci_dev_t dev = ~0;
int busnr = 0;

3
board/MAI/AmigaOneG3SE/cmd_boota.c
View File

@ -3,6 +3,7 @@
#include "../disk/part_amiga.h"
#include <asm/cache.h>
DECLARE_GLOBAL_DATA_PTR;
#undef BOOTA_DEBUG
@ -108,8 +109,6 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
s = getenv ("autostart");
if (s && strcmp (s, "yes") == 0) {
DECLARE_GLOBAL_DATA_PTR;
void (*boot) (bd_t *, char *, block_dev_desc_t *);
char *args;

6
board/MAI/AmigaOneG3SE/serial.c
View File

@ -4,6 +4,8 @@
#include "memio.h"
#include "articiaS.h"
DECLARE_GLOBAL_DATA_PTR;
#ifndef CFG_NS16550
static uint32 ComPort1;
@ -150,8 +152,6 @@ const NS16550_t Com1 = (NS16550_t) CFG_NS16550_COM2;
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
uint32 clock_divisor = 115200 / gd->baudrate;
NS16550_init (Com0, clock_divisor);
@ -239,8 +239,6 @@ void serial_puts (const char *string)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
uint32 clock_divisor = 115200 / gd->baudrate;
NS16550_init (Com0, clock_divisor);

40
board/MAI/AmigaOneG3SE/via686.c
View File

@ -28,6 +28,8 @@
#include "via686.h"
#include "i8259.h"
DECLARE_GLOBAL_DATA_PTR;
#undef VIA_DEBUG
#ifdef VIA_DEBUG
@ -226,33 +228,31 @@ __asm (" .globl via_calibrate_time_base \n"
extern unsigned long via_calibrate_time_base(void);
void via_calibrate_bus_freq(void)
void via_calibrate_bus_freq (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long tb;
unsigned long tb;
/* This is 20 microseconds */
#define CALIBRATE_TIME 28636
/* This is 20 microseconds */
#define CALIBRATE_TIME 28636
/* Enable the timer (and disable speaker) */
unsigned char c;
c = in_byte (0x61);
out_byte (0x61, ((c & ~0x02) | 0x01));
/* Enable the timer (and disable speaker) */
unsigned char c;
c = in_byte(0x61);
out_byte(0x61, ((c & ~0x02) | 0x01));
/* Set timer 2 to low/high writing */
out_byte (0x43, 0xb0);
out_byte (0x42, CALIBRATE_TIME & 0xff);
out_byte (0x42, CALIBRATE_TIME >> 8);
/* Set timer 2 to low/high writing */
out_byte(0x43, 0xb0);
out_byte(0x42, CALIBRATE_TIME & 0xff);
out_byte(0x42, CALIBRATE_TIME >>8);
/* Read the time base */
tb = via_calibrate_time_base ();
/* Read the time base */
tb = via_calibrate_time_base();
if (tb >= 700000)
gd->bus_clk = 133333333;
else
gd->bus_clk = 100000000;
if (tb >= 700000)
gd->bus_clk = 133333333;
else
gd->bus_clk = 100000000;
}

3
board/MAI/AmigaOneG3SE/video.c
View File

@ -26,6 +26,8 @@
#include "memio.h"
#include <part.h>
DECLARE_GLOBAL_DATA_PTR;
unsigned char *cursor_position;
unsigned int cursor_row;
unsigned int cursor_col;
@ -480,7 +482,6 @@ extern char version_string[];
void video_banner(void)
{
block_dev_desc_t *ide;
DECLARE_GLOBAL_DATA_PTR;
int i;
char *s;
int maxdev;

10
board/Marvell/common/serial.c
View File

@ -45,13 +45,13 @@
#include "ns16550.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_MPSC
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
int clock_divisor = 230400 / gd->baudrate;
#endif
@ -88,8 +88,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
}
@ -97,8 +95,6 @@ void serial_setbrg (void)
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = 230400 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
@ -130,8 +126,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = 230400 / gd->baudrate;
#ifdef CFG_INIT_CHAN1

8
board/Marvell/db64360/mpsc.c
View File

@ -42,6 +42,8 @@
#include "../include/memory.h"
DECLARE_GLOBAL_DATA_PTR;
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
@ -114,9 +116,7 @@ static void mpsc_debug_init (void)
/* Clear the CFR (CHR4) */
/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
REG_GAP));
temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
temp &= 0xffffff00;
temp |= BIT29;
GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
@ -158,7 +158,6 @@ char mpsc_getchar_debug (void)
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@ -511,7 +510,6 @@ void mpsc_init2 (void)
int galbrg_set_baudrate (int channel, int rate)
{
DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */

1
board/Marvell/db64360/mv_eth.c
View File

@ -732,6 +732,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {

4
board/Marvell/db64360/sdram_init.c
View File

@ -42,6 +42,8 @@
#include "64360.h"
#include "mv_regs.h"
DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
#define MAP_PCI
@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long spd_checksum;
#ifdef ZUMA_NTL

8
board/Marvell/db64460/mpsc.c
View File

@ -42,6 +42,8 @@
#include "../include/memory.h"
DECLARE_GLOBAL_DATA_PTR;
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
@ -114,9 +116,7 @@ static void mpsc_debug_init (void)
/* Clear the CFR (CHR4) */
/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
REG_GAP));
temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
temp &= 0xffffff00;
temp |= BIT29;
GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
@ -158,7 +158,6 @@ char mpsc_getchar_debug (void)
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@ -511,7 +510,6 @@ void mpsc_init2 (void)
int galbrg_set_baudrate (int channel, int rate)
{
DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */

1
board/Marvell/db64460/mv_eth.c
View File

@ -731,6 +731,7 @@ int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {

4
board/Marvell/db64460/sdram_init.c
View File

@ -42,6 +42,8 @@
#include "64460.h"
#include "mv_regs.h"
DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
#define MAP_PCI
@ -246,8 +248,6 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long spd_checksum;
#ifdef ZUMA_NTL

6
board/adsvix/adsvix.c
View File

@ -30,6 +30,8 @@
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
@ -38,8 +40,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -62,8 +62,6 @@ int board_late_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

6
board/amcc/ebony/ebony.c
View File

@ -28,6 +28,8 @@
#define FLASH_ONBD_N 2 /* 00000010 */
#define FLASH_SRAM_SEL 1 /* 00000001 */
DECLARE_GLOBAL_DATA_PTR;
long int fixed_sdram(void);
int board_early_init_f(void)
@ -107,7 +109,7 @@ long int initdram(int board_type)
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
dram_size = spd_sdram(0);
dram_size = spd_sdram();
#else
dram_size = fixed_sdram();
#endif
@ -235,8 +237,6 @@ int pci_pre_init(struct pci_controller *hose)
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
DECLARE_GLOBAL_DATA_PTR;
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/

3
board/amcc/luan/luan.c
View File

@ -28,6 +28,7 @@
#include <spd_sdram.h>
#include "epld.h"
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
@ -291,8 +292,6 @@ int pci_pre_init( struct pci_controller *hose )
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
DECLARE_GLOBAL_DATA_PTR;
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/

6
board/amcc/ocotea/ocotea.c
View File

@ -30,6 +30,8 @@
#include <spd_sdram.h>
#include <ppc4xx_enet.h>
DECLARE_GLOBAL_DATA_PTR;
#define BOOT_SMALL_FLASH 32 /* 00100000 */
#define FLASH_ONBD_N 2 /* 00000010 */
#define FLASH_SRAM_SEL 1 /* 00000001 */
@ -204,7 +206,7 @@ long int initdram (int board_type)
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
dram_size = spd_sdram (0);
dram_size = spd_sdram ();
#else
dram_size = fixed_sdram ();
#endif
@ -334,8 +336,6 @@ int pci_pre_init(struct pci_controller * hose )
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
DECLARE_GLOBAL_DATA_PTR;
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/

2
board/amcc/walnut/walnut.c
View File

@ -99,7 +99,7 @@ void sdram_init(void)
*/
long int initdram(int board_type)
{
return spd_sdram(0);
return spd_sdram();
}
int testdram(void)

3
board/amcc/yellowstone/yellowstone.c
View File

@ -24,6 +24,8 @@
#include <asm/processor.h>
#include <spd_sdram.h>
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
int board_early_init_f(void)
@ -136,7 +138,6 @@ int board_early_init_f(void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
uint pbcr;
int size_val = 0;

3
board/amcc/yosemite/yosemite.c
View File

@ -24,6 +24,8 @@
#include <asm/processor.h>
#include <spd_sdram.h>
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
int board_early_init_f(void)
@ -132,7 +134,6 @@ int board_early_init_f(void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
uint pbcr;
int size_val = 0;

8
board/amirix/ap1000/serial.c
View File

@ -27,9 +27,7 @@
#include <ns16550.h>
#if 0
#include "serial.h"
#endif
DECLARE_GLOBAL_DATA_PTR;
const NS16550_t COM_PORTS[] =
{ (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 };
@ -40,8 +38,6 @@ static int gComPort = 0;
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
(void) NS16550_init (COM_PORTS[0], clock_divisor);
@ -71,8 +67,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1

6
board/armadillo/armadillo.c
View File

@ -28,6 +28,8 @@
#include <common.h>
#include <clps7111.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@ -37,8 +39,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
@ -53,8 +53,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/assabet/assabet.c
View File

@ -27,6 +27,8 @@
#include <common.h>
#include <SA-1100.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
@ -99,8 +101,6 @@ neponset_init(void)
int
board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_arch_number = MACH_TYPE_ASSABET;
gd->bd->bi_boot_params = 0xc0000100;
@ -112,8 +112,6 @@ board_init(void)
int
dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/at91rm9200dk/at91rm9200dk.c
View File

@ -27,6 +27,8 @@
#include <at91rm9200_net.h>
#include <dm9161.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
@ -34,8 +36,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Enable Ctrlc */
console_init_f ();
@ -56,8 +56,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;

6
board/bmw/serial.c
View File

@ -24,6 +24,8 @@
#include <common.h>
#include "ns16550.h"
DECLARE_GLOBAL_DATA_PTR;
#if CONFIG_CONS_INDEX == 1
static struct NS16550 *console =
(struct NS16550 *) (CFG_EUMB_ADDR + 0x4500);
@ -38,8 +40,6 @@ extern ulong get_bus_freq (ulong);
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = gd->bus_clk / 16 / gd->baudrate;
NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor);
@ -75,8 +75,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate;
NS16550_reinit (console, clock_divisor);

6
board/cerf250/cerf250.c
View File

@ -27,6 +27,8 @@
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@ -36,8 +38,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -60,8 +60,6 @@ int board_late_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

6
board/cm4008/cm4008.c
View File

@ -31,6 +31,8 @@
#include <common.h>
#include <asm/arch/platform.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
@ -75,8 +77,6 @@ int board_late_init (void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* arch number of CM4008 */
gd->bd->bi_arch_number = 624;
@ -92,8 +92,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/cm41xx/cm41xx.c
View File

@ -31,6 +31,8 @@
#include <common.h>
#include <asm/arch/platform.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
@ -75,8 +77,6 @@ int board_late_init (void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* arch number of CM41xx */
gd->bd->bi_arch_number = 672;
@ -92,8 +92,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

5
board/cmc_pu2/cmc_pu2.c
View File

@ -33,6 +33,8 @@
#include <at91rm9200_net.h>
#include <dm9161.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
@ -45,7 +47,6 @@ int hw_detect (void);
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
AT91PS_PIO piob = AT91C_BASE_PIOB;
AT91PS_PIO pioc = AT91C_BASE_PIOC;
@ -109,8 +110,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;

161
board/cogent/serial.c
View File

@ -6,6 +6,8 @@
#include <common.h>
#include <board/cogent/serial.h>
DECLARE_GLOBAL_DATA_PTR;
#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
@ -25,76 +27,65 @@
int serial_init (void)
{
/* DECLARE_GLOBAL_DATA_PTR; */
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
serial_setbrg ();
cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
serial_setbrg ();
cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
return (0);
return (0);
}
void
serial_setbrg (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
unsigned int divisor;
unsigned char lcr;
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
unsigned int divisor;
unsigned char lcr;
if ((divisor = br_to_div (gd->baudrate)) == 0)
divisor = DEFDIV;
if ((divisor = br_to_div(gd->baudrate)) == 0)
divisor = DEFDIV;
lcr = cma_mb_reg_read(&mbsp->ser_lcr);
cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */
lcr = cma_mb_reg_read (&mbsp->ser_lcr);
cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */
cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
}
void
serial_putc(const char c)
void serial_putc (const char c)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
if (c == '\n')
serial_putc('\r');
if (c == '\n')
serial_putc ('\r');
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
;
while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
cma_mb_reg_write(&mbsp->ser_thr, c);
cma_mb_reg_write (&mbsp->ser_thr, c);
}
void
serial_puts(const char *s)
void serial_puts (const char *s)
{
while (*s != '\0')
serial_putc(*s++);
while (*s != '\0')
serial_putc (*s++);
}
int
serial_getc(void)
int serial_getc (void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
;
while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
}
int
serial_tstc(void)
int serial_tstc (void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
}
#endif /* CONS_NONE */
@ -118,71 +109,63 @@ serial_tstc(void)
#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
#endif
void
kgdb_serial_init(void)
void kgdb_serial_init (void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
unsigned int divisor;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
unsigned int divisor;
if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
divisor = DEFDIV;
if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
divisor = DEFDIV;
cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/
cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */
cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
printf("[on cma10x serial port B] ");
printf ("[on cma10x serial port B] ");
}
void
putDebugChar(int c)
void putDebugChar (int c)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
;
while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
}
void
putDebugStr(const char *str)
void putDebugStr (const char *str)
{
while (*str != '\0') {
if (*str == '\n')
putDebugChar('\r');
putDebugChar(*str++);
}
while (*str != '\0') {
if (*str == '\n')
putDebugChar ('\r');
putDebugChar (*str++);
}
}
int
getDebugChar(void)
int getDebugChar (void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
;
while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
}
void
kgdb_interruptible(int yes)
void kgdb_interruptible (int yes)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
if (yes == 1) {
printf("kgdb: turning serial ints on\n");
cma_mb_reg_write(&mbsp->ser_ier, 0xf);
}
else {
printf("kgdb: turning serial ints off\n");
cma_mb_reg_write(&mbsp->ser_ier, 0x0);
}
if (yes == 1) {
printf ("kgdb: turning serial ints on\n");
cma_mb_reg_write (&mbsp->ser_ier, 0xf);
} else {
printf ("kgdb: turning serial ints off\n");
cma_mb_reg_write (&mbsp->ser_ier, 0x0);
}
}
#endif /* KGDB && KGDB_NONE */

6
board/cradle/cradle.c
View File

@ -28,6 +28,8 @@
#include <asm/arch/pxa-regs.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@ -181,8 +183,6 @@ int
board_init (void)
/**********************************************************/
{
DECLARE_GLOBAL_DATA_PTR;
led_code (0xf, YELLOW);
/* arch number of HHP Cradle */
@ -209,8 +209,6 @@ int
dram_init (void)
/**********************************************************/
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

6
board/csb226/csb226.c
View File

@ -26,6 +26,8 @@
#include <common.h>
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
#else
@ -65,8 +67,6 @@ int misc_init_r(void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -88,8 +88,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/csb637/csb637.c
View File

@ -26,6 +26,8 @@
#include <at91rm9200_net.h>
#include <bcm5221.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
@ -33,8 +35,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Enable Ctrlc */
console_init_f ();
@ -51,8 +51,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;

6
board/cu824/cu824.c
View File

@ -2,7 +2,7 @@
* (C) Copyright 2001
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*
* (C) Copyright 2001, 2002
* (C) Copyright 2001-2006
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
* See file CREDITS for list of people who contributed to this
@ -29,12 +29,12 @@
#include <asm/processor.h>
#include <pci.h>
DECLARE_GLOBAL_DATA_PTR;
#define BOARD_REV_REG 0xFE80002B
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char revision = *(volatile char *)(BOARD_REV_REG);
char buf[32];

5
board/dave/B2/B2.c
View File

@ -27,13 +27,14 @@
#include <common.h>
#include <asm/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialization
*/
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
u32 temp;
/* Configuration Port Control Register*/
@ -119,8 +120,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

4
board/dave/PPChameleonEVB/PPChameleonEVB.c
View File

@ -29,6 +29,8 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/* Prototypes */
@ -81,8 +83,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart = 0 - flash_info[0].size;
gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;

6
board/delta/delta.c
View File

@ -30,6 +30,8 @@
#include <da9030.h>
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
static void init_DA9030(void);
@ -40,8 +42,6 @@ static void init_DA9030(void);
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -65,8 +65,6 @@ int board_late_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

12
board/dnp1110/dnp1110.c
View File

@ -24,8 +24,8 @@
#include <common.h>
#include <SA-1100.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -33,25 +33,21 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* arch number of DNP1110-Board */
gd->bd->bi_arch_number = MACH_TYPE_DNP1110;
/* flash vpp on */
PPDR |= 0x80; /* assumes LCD controller is off */
PPSR |= 0x80;
/* flash vpp on */
PPDR |= 0x80; /* assumes LCD controller is off */
PPSR |= 0x80;
return 0;
}
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

4
board/eltec/bab7xx/bab7xx.c
View File

@ -31,6 +31,8 @@
#include <ns87308.h>
#include <video_fb.h>
DECLARE_GLOBAL_DATA_PTR;
/*---------------------------------------------------------------------------*/
/*
* Get Bus clock frequency
@ -169,8 +171,6 @@ long int initdram (int board_type)
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/

4
board/eltec/elppc/elppc.c
View File

@ -26,6 +26,8 @@
#include <mpc106.h>
#include <video_fb.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
int checkboard (void)
@ -137,8 +139,6 @@ void watchdog_reset (void)
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/

7
board/ep7312/ep7312.c
View File

@ -25,8 +25,7 @@
#include <common.h>
#include <clps7111.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -34,8 +33,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
@ -50,8 +47,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/esd/apc405/apc405.c
View File

@ -26,7 +26,7 @@
#include <command.h>
#include <malloc.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
#if 0
#define FPGA_DEBUG
@ -166,8 +166,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
volatile unsigned short *fpga_mode =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *fpga_ctrl2 =
@ -301,8 +299,6 @@ int misc_init_r (void)
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned char str[64];
int i = getenv_r ("serial#", str, sizeof(str));

6
board/esd/ar405/ar405.c
View File

@ -26,6 +26,8 @@
#include <asm/processor.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
extern void lxt971_no_sleep(void);
@ -53,8 +55,6 @@ const unsigned char fpgadata_xl30[] = {
int board_early_init_f (void)
{
DECLARE_GLOBAL_DATA_PTR;
int index, len, i;
int status;
@ -151,8 +151,6 @@ int board_early_init_f (void)
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
int index;
int len;
char str[64];

3
board/esd/canbt/canbt.c
View File

@ -26,6 +26,7 @@
#include <asm/processor.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@ -50,8 +51,6 @@ const unsigned char fpgadata[] = {
int board_early_init_f (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
int index, len, i;
int status;

4
board/esd/cms700/cms700.c
View File

@ -26,10 +26,10 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
@ -87,8 +87,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;

3
board/esd/cpci2dp/cpci2dp.c
View File

@ -26,6 +26,8 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f (void)
{
unsigned long cntrl0Reg;
@ -74,7 +76,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
/* adjust flash start and offset */

10
board/esd/cpci405/cpci405.c
View File

@ -27,7 +27,8 @@
#include <malloc.h>
#include <net.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
#if 0
#define FPGA_DEBUG
@ -100,8 +101,6 @@ int board_early_init_f (void)
#endif
#ifdef FPGA_DEBUG
DECLARE_GLOBAL_DATA_PTR;
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
@ -126,8 +125,6 @@ int board_early_init_f (void)
if (status != 0) {
/* booting FPGA failed */
#ifndef FPGA_DEBUG
DECLARE_GLOBAL_DATA_PTR;
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
@ -268,7 +265,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
/* adjust flash start and offset */
@ -707,8 +703,6 @@ U_BOOT_CMD(
*/
int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
char *buf;
ulong crc;

4
board/esd/cpci750/mpsc.c
View File

@ -42,6 +42,8 @@
#include "../../Marvell/include/memory.h"
DECLARE_GLOBAL_DATA_PTR;
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
@ -157,7 +159,6 @@ char mpsc_getchar_debug (void)
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
@ -510,7 +511,6 @@ void mpsc_init2 (void)
int galbrg_set_baudrate (int channel, int rate)
{
DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */

1
board/esd/cpci750/mv_eth.c
View File

@ -733,6 +733,7 @@ int mv64360_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {

3
board/esd/cpci750/sdram_init.c
View File

@ -45,6 +45,7 @@
#include "64360.h"
#include "mv_regs.h"
DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
/* #define DEBUG */
@ -250,8 +251,6 @@ NSto10PS(unsigned char spd_byte)
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long spd_checksum;
uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;

7
board/esd/cpci750/serial.c
View File

@ -38,13 +38,12 @@
#include "../../Marvell/include/memory.h"
#include "serial.h"
#include "mpsc.h"
DECLARE_GLOBAL_DATA_PTR;
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
mpsc_init (gd->baudrate);
return (0);
@ -70,8 +69,6 @@ int serial_tstc (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
}

4
board/esd/cpciiser4/cpciiser4.c
View File

@ -26,6 +26,8 @@
#include <asm/processor.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@ -55,8 +57,6 @@ const unsigned char fpgadata[] = {
int board_early_init_f (void)
{
DECLARE_GLOBAL_DATA_PTR;
int index, len, i;
volatile unsigned char dummy;
int status;

3
board/esd/dp405/dp405.c
View File

@ -26,6 +26,7 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
@ -84,8 +85,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;

4
board/esd/du405/du405.c
View File

@ -28,6 +28,8 @@
#include <405gp_i2c.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@ -55,8 +57,6 @@ const unsigned char fpgadata[] = {
int board_early_init_f (void)
{
DECLARE_GLOBAL_DATA_PTR;
int index, len, i;
int status;

12
board/esd/hh405/hh405.c
View File

@ -34,6 +34,8 @@
#include <pci.h>
#include <sm501.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_VIDEO_SM501
#define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\
@ -358,8 +360,6 @@ int board_early_init_f (void)
int cf_enable(void)
{
DECLARE_GLOBAL_DATA_PTR;
int i;
volatile unsigned short *fpga_ctrl =
@ -391,8 +391,6 @@ int cf_enable(void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
volatile unsigned short *fpga_ctrl =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *lcd_contrast =
@ -628,8 +626,6 @@ int misc_init_r (void)
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
@ -673,8 +669,6 @@ long int initdram (int board_type)
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{
DECLARE_GLOBAL_DATA_PTR;
volatile unsigned short *fpga_mode =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *fpga_status =
@ -788,8 +782,6 @@ U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
*/
void video_get_info_str (int line_number, char *info)
{
DECLARE_GLOBAL_DATA_PTR;
char str[64];
char str2[64];
int i = getenv_r("serial#", str2, sizeof(str));

6
board/esd/hub405/hub405.c
View File

@ -26,10 +26,10 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
int board_revision(void)
{
unsigned long osrl_reg;
@ -110,8 +110,6 @@ int misc_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
@ -208,8 +206,6 @@ int misc_init_r (void)
*/
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));

7
board/esd/pci405/pci405.c
View File

@ -30,6 +30,7 @@
#include "pci405.h"
DECLARE_GLOBAL_DATA_PTR;
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
@ -111,8 +112,6 @@ int board_revision(void)
unsigned long fpga_done_state(void)
{
DECLARE_GLOBAL_DATA_PTR;
if (gd->board_type < 2) {
return FPGA_DONE_STATE_V11;
} else {
@ -123,8 +122,6 @@ unsigned long fpga_done_state(void)
unsigned long fpga_init_state(void)
{
DECLARE_GLOBAL_DATA_PTR;
if (gd->board_type < 2) {
return FPGA_INIT_STATE_V11;
} else {
@ -320,8 +317,6 @@ int misc_init_r (void)
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));

4
board/esd/pmc405/pmc405.c
View File

@ -29,10 +29,10 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
@ -100,8 +100,6 @@ int board_early_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;

4
board/esd/vom405/vom405.c
View File

@ -26,10 +26,10 @@
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
@ -81,8 +81,6 @@ int board_early_init_f (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;

4
board/etin/debris/debris.c
View File

@ -26,6 +26,8 @@
#include <pci.h>
#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard (void)
{
/*TODO: Check processor type */
@ -170,8 +172,6 @@ void nvram_write(long dest, const void *src, size_t count)
int misc_init_r(void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Write ethernet addr in NVRAM for VxWorks */
nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
(char*)&gd->bd->bi_enetaddr[0], 6);

4
board/etx094/etx094.c
View File

@ -24,6 +24,8 @@
#include <common.h>
#include <mpc8xx.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
@ -90,8 +92,6 @@ const uint sdram_table[] = {
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char *s = getenv ("serial#");
char *e;

5
board/evb4510/evb4510.c
View File

@ -25,6 +25,8 @@
#include <asm/hardware.h>
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_EVB4510
/* ------------------------------------------------------------------------- */
@ -35,8 +37,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
icache_enable();
/* address for the kernel command line */
@ -52,7 +52,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#if CONFIG_NR_DRAM_BANKS == 2

5
board/evb64260/evb64260.c
View File

@ -37,6 +37,9 @@
#include "mpsc.h"
#include "i2c.h"
#include "64260.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_ZUMA_V2
extern void zuma_mbox_init(void);
#endif
@ -323,8 +326,6 @@ int misc_init_r (void)
void
after_reloc(ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/* check to see if we booted from the sram. If so, move things
* back to the way they should be. (we're running from main
* memory at this point now */

140
board/evb64260/mpsc.c
View File

@ -32,6 +32,8 @@
#include <malloc.h>
#include "mpsc.h"
DECLARE_GLOBAL_DATA_PTR;
int (*mpsc_putchar)(char ch) = mpsc_putchar_early;
static volatile unsigned int *rx_desc_base=NULL;
@ -115,7 +117,6 @@ struct _tag_mirror_hack {
int
mpsc_putchar_early(char ch)
{
DECLARE_GLOBAL_DATA_PTR;
int mpsc=CHANNEL;
int temp=GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
galmpsc_set_tcschar(mpsc,ch);
@ -177,79 +178,82 @@ mpsc_putchar_sdma(char ch)
return 0;
}
char
mpsc_getchar(void)
char mpsc_getchar (void)
{
DECLARE_GLOBAL_DATA_PTR;
static unsigned int done = 0;
volatile char ch;
unsigned int len=0, idx=0, temp;
static unsigned int done = 0;
volatile char ch;
unsigned int len = 0, idx = 0, temp;
volatile unsigned int *p;
volatile unsigned int *p;
do {
p=&rx_desc_base[rx_desc_index*8];
do {
p = &rx_desc_base[rx_desc_index * 8];
INVALIDATE_DCACHE(&p[0], &p[1]);
/* Wait for character */
while (p[1] & DESC_OWNER){
udelay(100);
INVALIDATE_DCACHE(&p[0], &p[1]);
}
INVALIDATE_DCACHE (&p[0], &p[1]);
/* Wait for character */
while (p[1] & DESC_OWNER) {
udelay (100);
INVALIDATE_DCACHE (&p[0], &p[1]);
}
/* Handle error case */
if (p[1] & (1<<15)) {
printf("oops, error: %08x\n", p[1]);
/* Handle error case */
if (p[1] & (1 << 15)) {
printf ("oops, error: %08x\n", p[1]);
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,CHANNEL,GALMPSC_REG_GAP);
temp |= (1 << 23);
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2, CHANNEL,GALMPSC_REG_GAP, temp);
temp = GTREGREAD_MIRROR (GALMPSC_CHANNELREG_2,
CHANNEL, GALMPSC_REG_GAP);
temp |= (1 << 23);
GT_REG_WRITE_MIRROR (GALMPSC_CHANNELREG_2, CHANNEL,
GALMPSC_REG_GAP, temp);
/* Can't poll on abort bit, so we just wait. */
udelay(100);
/* Can't poll on abort bit, so we just wait. */
udelay (100);
galsdma_enable_rx();
}
galsdma_enable_rx ();
}
/* Number of bytes left in this descriptor */
len = p[0] & 0xffff;
/* Number of bytes left in this descriptor */
len = p[0] & 0xffff;
if (len) {
/* Where to look */
idx = 5;
if (done > 3) idx = 4;
if (done > 7) idx = 7;
if (done > 11) idx = 6;
if (len) {
/* Where to look */
idx = 5;
if (done > 3)
idx = 4;
if (done > 7)
idx = 7;
if (done > 11)
idx = 6;
INVALIDATE_DCACHE(&p[idx], &p[idx+1]);
ch = p[idx] & 0xff;
done++;
}
INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
ch = p[idx] & 0xff;
done++;
}
if (done < len) {
/* this descriptor has more bytes still
* shift down the char we just read, and leave the
* buffer in place for the next time around
*/
p[idx] = p[idx] >> 8;
FLUSH_DCACHE(&p[idx], &p[idx+1]);
}
if (done < len) {
/* this descriptor has more bytes still
* shift down the char we just read, and leave the
* buffer in place for the next time around
*/
p[idx] = p[idx] >> 8;
FLUSH_DCACHE (&p[idx], &p[idx + 1]);
}
if (done == len) {
/* nothing left in this descriptor.
* go to next one
*/
p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
p[0] = 0x00100000;
FLUSH_DCACHE(&p[0], &p[1]);
/* Next descriptor */
rx_desc_index = (rx_desc_index + 1) % RX_DESC;
done = 0;
}
} while (len==0); /* galileo bug.. len might be zero */
if (done == len) {
/* nothing left in this descriptor.
* go to next one
*/
p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
p[0] = 0x00100000;
FLUSH_DCACHE (&p[0], &p[1]);
/* Next descriptor */
rx_desc_index = (rx_desc_index + 1) % RX_DESC;
done = 0;
}
} while (len == 0); /* galileo bug.. len might be zero */
return ch;
return ch;
}
int
@ -266,8 +270,6 @@ mpsc_test_char(void)
int
mpsc_init(int baud)
{
DECLARE_GLOBAL_DATA_PTR;
memset(MIRROR_HACK, 0, sizeof(struct _tag_mirror_hack));
MIRROR_HACK->GALMPSC_ROUTING_REGISTER_M=0x3fffffff;
@ -382,7 +384,6 @@ mpsc_init2(void)
int
galbrg_set_baudrate(int channel, int rate)
{
DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable(channel);
@ -410,7 +411,6 @@ galbrg_set_baudrate(int channel, int rate)
static int
galbrg_set_CDV(int channel, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@ -424,7 +424,6 @@ galbrg_set_CDV(int channel, int value)
static int
galbrg_enable(int channel)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@ -437,7 +436,6 @@ galbrg_enable(int channel)
static int
galbrg_disable(int channel)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
@ -450,7 +448,6 @@ galbrg_disable(int channel)
static int
galbrg_set_clksrc(int channel, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP);
@ -583,7 +580,6 @@ galsdma_set_burstsize(int channel, unsigned int value)
static int
galmpsc_connect(int channel, int connect)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_ROUTING_REGISTER);
@ -629,7 +625,6 @@ galmpsc_route_serial(int channel, int connect)
static int
galmpsc_route_rx_clock(int channel, int brg)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_RxC_ROUTE);
@ -647,7 +642,6 @@ galmpsc_route_rx_clock(int channel, int brg)
static int
galmpsc_route_tx_clock(int channel, int brg)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_TxC_ROUTE);
@ -688,7 +682,6 @@ galmpsc_write_config_regs(int mpsc, int mode)
static int
galmpsc_config_channel_regs(int mpsc)
{
DECLARE_GLOBAL_DATA_PTR;
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, 0);
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, 0);
GT_REG_WRITE(GALMPSC_CHANNELREG_3+(mpsc*GALMPSC_REG_GAP), 1);
@ -709,7 +702,6 @@ galmpsc_config_channel_regs(int mpsc)
static int
galmpsc_set_brkcnt(int mpsc, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
@ -723,7 +715,6 @@ galmpsc_set_brkcnt(int mpsc, int value)
static int
galmpsc_set_tcschar(int mpsc, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
@ -737,7 +728,6 @@ galmpsc_set_tcschar(int mpsc, int value)
static int
galmpsc_set_char_length(int mpsc, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
@ -751,7 +741,6 @@ galmpsc_set_char_length(int mpsc, int value)
static int
galmpsc_set_stop_bit_length(int mpsc, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
@ -764,7 +753,6 @@ galmpsc_set_stop_bit_length(int mpsc, int value)
static int
galmpsc_set_parity(int mpsc, int value)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
@ -784,7 +772,6 @@ galmpsc_set_parity(int mpsc, int value)
static int
galmpsc_enter_hunt(int mpsc)
{
DECLARE_GLOBAL_DATA_PTR;
int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
@ -802,7 +789,6 @@ galmpsc_enter_hunt(int mpsc)
static int
galmpsc_shutdown(int mpsc)
{
DECLARE_GLOBAL_DATA_PTR;
#if 0
unsigned int temp;

3
board/evb64260/sdram_init.c
View File

@ -35,6 +35,8 @@
#include "i2c.h"
#include "64260.h"
DECLARE_GLOBAL_DATA_PTR;
/* #define DEBUG */
#define MAP_PCI
@ -199,7 +201,6 @@ static int check_dimm (uchar slot, sdram_info_t * info)
* the array which is passed in with the relevant information */
static int check_dimm (uchar slot, sdram_info_t * info)
{
DECLARE_GLOBAL_DATA_PTR;
uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
int ret;
uchar rows, cols, sdram_banks, supp_cal, width, cal_val;

10
board/evb64260/serial.c
View File

@ -39,6 +39,8 @@
#include "mpsc.h"
DECLARE_GLOBAL_DATA_PTR;
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
(NS16550_t) CFG_NS16550_COM2 };
@ -48,8 +50,6 @@ const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#endif
@ -90,8 +90,6 @@ serial_tstc(void)
void
serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
galbrg_set_baudrate(CONFIG_MPSC_PORT, gd->baudrate);
}
@ -99,8 +97,6 @@ serial_setbrg (void)
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
@ -137,8 +133,6 @@ serial_tstc(void)
void
serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1

3
board/ezkit533/ezkit533.c
View File

@ -30,6 +30,8 @@
#include "psd4256.h"
#endif
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
@ -41,7 +43,6 @@ int checkboard(void)
long int initdram(int board_type)
{
DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
int brate;
char *tmp = getenv("baudrate");

7
board/gcplus/gcplus.c
View File

@ -26,7 +26,8 @@
#include <common.h>
#include <SA-1100.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -35,8 +36,6 @@
int
board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
@ -62,8 +61,6 @@ board_init(void)
int
dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

4
board/gen860t/fpga.c
View File

@ -32,6 +32,8 @@
#include <command.h>
#include "fpga.h"
DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_FPGA)
#if 0
@ -189,8 +191,6 @@ void fpga_selectmap_init (void)
*/
int gen860t_init_fpga (void)
{
DECLARE_GLOBAL_DATA_PTR;
int i;
PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);

6
board/gen860t/gen860t.c
View File

@ -30,6 +30,8 @@
#include "fpga.h"
#include "ioport.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
@ -126,8 +128,6 @@ const uint selectmap_upm_table[] = {
*/
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char *s;
char buf[64];
int i;
@ -305,5 +305,3 @@ int post_hotkeys_pressed (void)
return 0; /* No hotkeys supported */
}
#endif
/* vim: set ts=4 sw=4 tw=78 : */

4
board/hermes/hermes.c
View File

@ -32,6 +32,8 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
@ -105,8 +107,6 @@ const uint sdram_table[] = {
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char *s = getenv ("serial#");
char *e;

4
board/hymod/bsp.c
View File

@ -28,6 +28,8 @@
#include <net.h>
#include <asm/iopin_8260.h>
DECLARE_GLOBAL_DATA_PTR;
/*-----------------------------------------------------------------------
* Board Special Commands: FPGA load/store, EEPROM erase
*/
@ -75,8 +77,6 @@
int
fpga_load (int mezz, uchar *addr, ulong size)
{
DECLARE_GLOBAL_DATA_PTR;
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
xlx_info_t *fp;
xlx_iopins_t *fpgaio;

4
board/hymod/env.c
View File

@ -23,6 +23,8 @@
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* imports from fetch.c */
extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
@ -32,8 +34,6 @@ static char *def_global_env_path = "/hymod/global_env";
static int
env_callback (uchar *name, uchar *value)
{
DECLARE_GLOBAL_DATA_PTR;
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver;
int override = 1, append = 0, remove = 0, nnl, ovl, nvl;

4
board/hymod/hymod.c
View File

@ -30,6 +30,8 @@
#include <i2c.h>
#include <asm/iopin_8260.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/* imports from eeprom.c */
@ -424,8 +426,6 @@ initdram (int board_type)
int
last_stage_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
int rc;

4
board/ids8247/ids8247.c
View File

@ -25,6 +25,8 @@
#include <ioports.h>
#include <mpc8260.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* I/O Port configuration table
*
@ -295,8 +297,6 @@ long int initdram (int board_type)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_flashstart = 0xff800000;
}

6
board/impa7/impa7.c
View File

@ -25,6 +25,8 @@
#include <common.h>
#include <clps7111.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@ -34,8 +36,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
@ -50,8 +50,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

6
board/innokom/innokom.c
View File

@ -27,6 +27,8 @@
#include <asm/arch/pxa-regs.h>
#include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
#else
@ -95,8 +97,6 @@ int misc_init_r(void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -116,8 +116,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/integratorap/integratorap.c
View File

@ -39,6 +39,8 @@
#include <pci.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
@ -65,8 +67,6 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
@ -480,8 +480,6 @@ void ether__init (void)
******************************/
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/integratorcp/integratorcp.c
View File

@ -35,6 +35,8 @@
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
@ -54,8 +56,6 @@ void show_boot_progress(int progress)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
@ -105,8 +105,6 @@ void ether__init (void)
******************************/
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

10
board/ixdp425/ixdp425.c
View File

@ -28,11 +28,7 @@
#include <asm/arch/ixp425.h>
#include <common.h>
/* ------------------------------------------------------------------------- */
/* local prototypes */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -49,8 +45,6 @@ int board_post_init (void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* arch number of IXDP */
gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
@ -64,8 +58,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

7
board/kb9202/kb9202.c
View File

@ -31,7 +31,8 @@
#include <at91rm9200_net.h>
#include <lxt971a.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
*/
@ -42,8 +43,6 @@ void lowlevel_init(void) {
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Enable Ctrlc */
console_init_f ();
@ -60,8 +59,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;

60
board/kup/kup4k/kup4k.c
View File

@ -29,6 +29,8 @@
#include "s1d13706.h"
#endif
DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
#ifdef DEBUG
# define debugk(fmt,args...) printf(fmt ,##args)
@ -44,10 +46,6 @@ typedef struct {
/* ------------------------------------------------------------------------- */
#if 0
static long int dram_size (long int, long int *, long int);
#endif
#ifdef CONFIG_KUP4K_LOGO
void lcd_logo(bd_t *bd);
#endif
@ -235,62 +233,8 @@ long int initdram (int board_type)
/* ------------------------------------------------------------------------- */
/*
* Check memory range for valid RAM. A simple memory test determines
* the actually available RAM size between addresses `base' and
* `base + maxsize'. Some (not all) hardware errors are detected:
* - short between address lines
* - short between data lines
*/
#if 0
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile long int *addr;
ulong cnt, val;
ulong save[32]; /* to make test non-destructive */
unsigned char i = 0;
memctl->memc_mamr = mamr_value;
for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
addr = base + cnt; /* pointer arith! */
save[i++] = *addr;
*addr = ~cnt;
}
/* write 0 to base address */
addr = base;
save[i] = *addr;
*addr = 0;
/* check at base address */
if ((val = *addr) != 0) {
*addr = save[i];
return (0);
}
for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
addr = base + cnt; /* pointer arith! */
val = *addr;
*addr = save[--i];
if (val != (~cnt)) {
return (cnt * sizeof (long));
}
}
return (maxsize);
}
#endif
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_STATUS_LED
volatile immap_t *immap = (immap_t *) CFG_IMMR;
#endif

5
board/lart/lart.c
View File

@ -24,6 +24,8 @@
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
@ -33,8 +35,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -49,7 +49,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
bd->bi_dram[0].start = PHYS_SDRAM_1;

6
board/logodl/logodl.c
View File

@ -25,6 +25,8 @@
#include <common.h>
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
/**
* board_init: - setup some data structures
*
@ -33,8 +35,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -57,8 +57,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

6
board/lpd7a40x/lpd7a40x.c
View File

@ -37,14 +37,14 @@
#include <lpd7a400_cpld.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscellaneous platform dependent initialisations
*/
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* set up the I/O ports */
/* enable flash programming */
@ -74,8 +74,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

7
board/lubbock/lubbock.c
View File

@ -27,8 +27,7 @@
#include <common.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -36,8 +35,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
@ -60,8 +57,6 @@ int board_late_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;

10
board/lwmon/lwmon.c
View File

@ -45,6 +45,8 @@ V* Verification: dzu@denx.de
#include <linux/types.h>
#include <linux/string.h> /* for strdup */
DECLARE_GLOBAL_DATA_PTR;
/*------------------------ Local prototypes ---------------------------*/
static long int dram_size (long int, long int *, long int);
static void kbd_init (void);
@ -455,8 +457,6 @@ Z* for the lwmon board.
***********************************************************************/
int board_postclk_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
kbd_init();
#ifdef CONFIG_MODEM_SUPPORT
@ -471,15 +471,11 @@ int board_postclk_init (void)
struct serial_device * default_serial_console (void)
{
DECLARE_GLOBAL_DATA_PTR;
return gd->do_mdm_init ? &serial_scc_device : &serial_smc_device;
}
static void kbd_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
uchar kbd_data[KEYBD_DATALEN];
uchar tmp_data[KEYBD_DATALEN];
uchar val, errcd;
@ -571,8 +567,6 @@ V* Verification: dzu@denx.de
***********************************************************************/
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
uchar kbd_init_status = gd->kbd_status >> 8;

4
board/mcc200/mcc200.c
View File

@ -30,6 +30,8 @@
#include "mt48lc8m32b2-6-7.h"
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[]; /* FLASH chips info */
ulong flash_get_size (ulong base, int banknum);
@ -190,8 +192,6 @@ int checkboard (void)
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Adjust flash start and offset to detected values
*/

72
board/ml2/serial.c
View File

@ -29,70 +29,59 @@
#include <ns16550.h>
#endif
#if 0
#include "serial.h"
#endif
DECLARE_GLOBAL_DATA_PTR;
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
(NS16550_t) CFG_NS16550_COM2 };
(NS16550_t) CFG_NS16550_COM2
};
#endif
int
serial_init (void)
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
(void)NS16550_init(COM_PORTS[0], clock_divisor);
(void) NS16550_init (COM_PORTS[0], clock_divisor);
#endif
#ifdef CFG_INIT_CHAN2
(void)NS16550_init(COM_PORTS[1], clock_divisor);
(void) NS16550_init (COM_PORTS[1], clock_divisor);
#endif
return 0;
return 0;
}
void
serial_putc(const char c)
void serial_putc (const char c)
{
if (c == '\n')
NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
if (c == '\n')
NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r');
NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c);
}
int
serial_getc(void)
int serial_getc (void)
{
return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]);
}
int
serial_tstc(void)
int serial_tstc (void)
{
return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]);
}
void
serial_setbrg (void)
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
NS16550_reinit(COM_PORTS[0], clock_divisor);
NS16550_reinit (COM_PORTS[0], clock_divisor);
#endif
#ifdef CFG_INIT_CHAN2
NS16550_reinit(COM_PORTS[1], clock_divisor);
NS16550_reinit (COM_PORTS[1], clock_divisor);
#endif
}
void
serial_puts (const char *s)
void serial_puts (const char *s)
{
while (*s) {
serial_putc (*s++);
@ -100,32 +89,27 @@ serial_puts (const char *s)
}
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
void
kgdb_serial_init(void)
void kgdb_serial_init (void)
{
}
void
putDebugChar (int c)
void putDebugChar (int c)
{
serial_putc (c);
}
void
putDebugStr (const char *str)
void putDebugStr (const char *str)
{
serial_puts (str);
}
int
getDebugChar (void)
int getDebugChar (void)
{
return serial_getc();
return serial_getc ();
}
void
kgdb_interruptible (int yes)
void kgdb_interruptible (int yes)
{
return;
}
#endif /* CFG_CMD_KGDB */
#endif /* CFG_CMD_KGDB */

5
board/modnet50/modnet50.c
View File

@ -24,8 +24,7 @@
#include <common.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@ -33,7 +32,6 @@
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* address for the kernel command line */
gd->bd->bi_boot_params = 0x800;
return 0;
@ -41,7 +39,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
if (CONFIG_NR_DRAM_BANKS == 2) {

7
board/mp2usb/mp2usb.c
View File

@ -31,15 +31,14 @@
#include <dm9161.h>
#include <asm/mach-types.h>
/* ------------------------------------------------------------------------- */
DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* Enable Ctrlc */
console_init_f ();
@ -56,8 +55,6 @@ int board_init (void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;

2
board/mpc8349ads/mpc8349ads.c
View File

@ -64,7 +64,7 @@ long int initdram (int board_type)
/* DDR SDRAM - Main SODIMM */
im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
#if defined(CONFIG_SPD_EEPROM)
msize = spd_sdram(NULL);
msize = spd_sdram();
#else
msize = fixed_sdram();
#endif

3
board/mpc8349ads/pci.c
View File

@ -26,6 +26,8 @@
#include <asm/mpc8349_pci.h>
#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_PCI
/* System RAM mapped to PCI space */
@ -127,7 +129,6 @@ pib_init(void)
void
pci_init_board(void)
{
DECLARE_GLOBAL_DATA_PTR;
volatile immap_t * immr;
volatile clk8349_t * clk;
volatile law8349_t * pci_law;

4
board/mpl/common/common_util.c
View File

@ -42,6 +42,9 @@
#include "../mip405/mip405.h"
#include <405gp_pci.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_PATI)
#define FIRM_START 0xFFF00000
#endif
@ -584,7 +587,6 @@ extern int get_boot_mode(void);
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
DECLARE_GLOBAL_DATA_PTR;
PPC405_SYS_INFO sys_info;
char rev;
int i,boot;

7
board/mpl/common/memtst.c
View File

@ -50,13 +50,15 @@ int testdram (void)
#include <asm/processor.h>
#include <405gp_i2c.h>
DECLARE_GLOBAL_DATA_PTR;
#define FALSE 0
#define TRUE 1
#define TEST_QUIET 8
#define TEST_QUIET 8
#define TEST_SHOW_PROG 4
#define TEST_SHOW_ERR 2
#define TEST_SHOW_ALL 1
#define TEST_SHOW_ALL 1
#define TESTPAT1 0xAA55AA55
#define TESTPAT2 0x55AA55AA
@ -468,7 +470,6 @@ static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = {
void mem_test_reloc(void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
int i;
for (i=0; i< TEST_STAGES; i++) {

3
board/mpl/common/pci.c
View File

@ -32,7 +32,7 @@
#ifdef CONFIG_405GP
#ifdef CONFIG_PCI
#undef DEBUG
DECLARE_GLOBAL_DATA_PTR;
#include "piix4_pci.h"
#include "pci_parts.h"
@ -94,7 +94,6 @@ static struct pci_controller hose = {
static void reloc_pci_cfg_table(struct pci_config_table *table)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
for (; table && table->vendor; table++) {

8
board/mpl/mip405/mip405.c
View File

@ -70,6 +70,9 @@
#include "../common/common_util.h"
#include <i2c.h>
#include <rtc.h>
DECLARE_GLOBAL_DATA_PTR;
extern block_dev_desc_t * scsi_get_dev(int dev);
extern block_dev_desc_t * ide_get_dev(int dev);
@ -189,8 +192,6 @@ const sdram_t sdram_table[] = {
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
DECLARE_GLOBAL_DATA_PTR;
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
@ -241,8 +242,6 @@ void write_4hex (unsigned long val)
int init_sdram (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long tmp, baseaddr;
unsigned short i;
unsigned char trp_clocks,
@ -681,7 +680,6 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;

Some files were not shown because too many files have changed in this diff Show More