mpc83xx: Introduce ARCH_MPC834*
Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options. Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
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bd3b867eb9
commit
d5cfa4aa5d
@ -14,6 +14,7 @@ config TARGET_MPC8308_P1M
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config TARGET_SBC8349
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bool "Support sbc8349"
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select ARCH_MPC8349
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config TARGET_VE8313
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bool "Support ve8313"
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@ -21,6 +22,7 @@ config TARGET_VE8313
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config TARGET_VME8349
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bool "Support vme8349"
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select ARCH_MPC8349
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config TARGET_MPC8308RDB
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bool "Support MPC8308RDB"
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@ -49,6 +51,7 @@ config TARGET_MPC832XEMDS
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config TARGET_MPC8349EMDS
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bool "Support MPC8349EMDS"
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select ARCH_MPC8349
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select BOARD_EARLY_INIT_F
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select SYS_FSL_DDR
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select SYS_FSL_DDR_BE
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@ -56,6 +59,7 @@ config TARGET_MPC8349EMDS
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config TARGET_MPC8349ITX
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bool "Support MPC8349ITX"
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select ARCH_MPC8349
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imply CMD_IRQ
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config TARGET_MPC837XEMDS
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@ -96,6 +100,7 @@ config TARGET_TUXX1
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config TARGET_TQM834X
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bool "Support TQM834x"
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select ARCH_MPC8349
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config TARGET_HRCON
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bool "Support hrcon"
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@ -135,6 +140,13 @@ config ARCH_MPC8315
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config ARCH_MPC832X
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bool
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config ARCH_MPC834X
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bool
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config ARCH_MPC8349
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bool
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select ARCH_MPC834X
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source "board/esd/vme8349/Kconfig"
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source "board/freescale/mpc8308rdb/Kconfig"
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source "board/freescale/mpc8313erdb/Kconfig"
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@ -240,7 +240,7 @@ void cpu_init_f (volatile immap_t * im)
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/* System General Purpose Register */
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#ifdef CONFIG_SYS_SICRH
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#if defined(CONFIG_MPC834x) || defined(CONFIG_ARCH_MPC8313)
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#if defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC8313)
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/* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
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__raw_writel((im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH,
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&im->sysconf.sicrh);
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@ -426,7 +426,7 @@ long int spd_sdram()
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/*
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* Errata DDR6 work around: input enable 2 cycles earlier.
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* including MPC834x Rev1.0/1.1 and MPC8360 Rev1.1/1.2.
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* including MPC834X Rev1.0/1.1 and MPC8360 Rev1.1/1.2.
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*/
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if(PVR_MAJ(pvr) <= 1 && spd.mem_type == SPD_MEMTYPE_DDR){
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if (caslat == 2)
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@ -86,14 +86,14 @@ int get_clocks(void)
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u32 csb_clk;
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#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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u32 tsec1_clk;
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u32 tsec2_clk;
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u32 usbdr_clk;
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#elif defined(CONFIG_ARCH_MPC8309)
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u32 usbdr_clk;
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#endif
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#ifdef CONFIG_MPC834x
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#ifdef CONFIG_ARCH_MPC834X
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u32 usbmph_clk;
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#endif
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u32 core_clk;
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@ -156,7 +156,7 @@ int get_clocks(void)
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sccr = im->clk.sccr;
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#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
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case 0:
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tsec1_clk = 0;
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@ -177,7 +177,7 @@ int get_clocks(void)
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#endif
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#if defined(CONFIG_ARCH_MPC830X) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) {
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case 0:
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usbdr_clk = 0;
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@ -198,7 +198,7 @@ int get_clocks(void)
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#endif
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#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC8315) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) {
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case 0:
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tsec2_clk = 0;
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@ -225,7 +225,7 @@ int get_clocks(void)
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tsec2_clk = 0;
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#endif
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) {
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case 0:
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usbmph_clk = 0;
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@ -311,7 +311,7 @@ int get_clocks(void)
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}
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#endif
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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i2c1_clk = tsec2_clk;
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#elif defined(CONFIG_MPC8360)
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i2c1_clk = csb_clk;
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@ -449,14 +449,14 @@ int get_clocks(void)
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gd->arch.csb_clk = csb_clk;
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#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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gd->arch.tsec1_clk = tsec1_clk;
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gd->arch.tsec2_clk = tsec2_clk;
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gd->arch.usbdr_clk = usbdr_clk;
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#elif defined(CONFIG_ARCH_MPC8309)
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gd->arch.usbdr_clk = usbdr_clk;
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#endif
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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gd->arch.usbmph_clk = usbmph_clk;
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#endif
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#if defined(CONFIG_ARCH_MPC8315)
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@ -559,7 +559,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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strmhz(buf, gd->arch.sdhc_clk));
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#endif
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#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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printf(" TSEC1: %-4s MHz\n",
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strmhz(buf, gd->arch.tsec1_clk));
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printf(" TSEC2: %-4s MHz\n",
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@ -570,7 +570,7 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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printf(" USB DR: %-4s MHz\n",
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strmhz(buf, gd->arch.usbdr_clk));
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#endif
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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printf(" USB MPH: %-4s MHz\n",
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strmhz(buf, gd->arch.usbmph_clk));
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#endif
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@ -9,7 +9,7 @@
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#if defined(CONFIG_ARCH_MPC8313) || defined(CONFIG_ARCH_MPC8308) || \
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defined(CONFIG_ARCH_MPC8315)
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#define MPC83XX_GPIO_CTRLRS 1
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#elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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#elif defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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#define MPC83XX_GPIO_CTRLRS 2
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#else
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#define MPC83XX_GPIO_CTRLRS 0
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@ -43,10 +43,10 @@ void lbc_sdram_init(void);
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#define BR_MSEL 0x000000E0
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#define BR_MSEL_SHIFT 5
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#define BR_MS_GPCM 0x00000000 /* GPCM */
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#if !defined(CONFIG_MPC834x) && !defined(CONFIG_MPC8360)
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#if !defined(CONFIG_ARCH_MPC834X) && !defined(CONFIG_MPC8360)
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#define BR_MS_FCM 0x00000020 /* FCM */
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#endif
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#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC8360)
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#if defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC8360)
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#define BR_MS_SDRAM 0x00000060 /* SDRAM */
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#elif defined(CONFIG_MPC85xx)
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#define BR_MS_SDRAM 0x00000000 /* SDRAM */
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@ -54,7 +54,7 @@ void lbc_sdram_init(void);
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#define BR_MS_UPMA 0x00000080 /* UPMA */
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#define BR_MS_UPMB 0x000000A0 /* UPMB */
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#define BR_MS_UPMC 0x000000C0 /* UPMC */
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#if !defined(CONFIG_MPC834x)
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#if !defined(CONFIG_ARCH_MPC834X)
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#define BR_ATOM 0x0000000C
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#define BR_ATOM_SHIFT 2
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#endif
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@ -67,7 +67,7 @@ void lbc_sdram_init(void);
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#define UPMB 1
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#define UPMC 2
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_V)
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#else
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#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V)
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@ -36,16 +36,16 @@ struct arch_global_data {
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/* There are other clocks in the MPC83XX */
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u32 csb_clk;
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# if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC831X) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_MPC837x)
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u32 tsec1_clk;
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u32 tsec2_clk;
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u32 usbdr_clk;
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# elif defined(CONFIG_ARCH_MPC8309)
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u32 usbdr_clk;
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# endif
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# if defined(CONFIG_MPC834x)
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# if defined(CONFIG_ARCH_MPC834X)
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u32 usbmph_clk;
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# endif /* CONFIG_MPC834x */
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# endif /* CONFIG_ARCH_MPC834X */
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# if defined(CONFIG_ARCH_MPC8315)
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u32 tdm_clk;
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# endif
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@ -625,7 +625,7 @@ typedef struct tdmdmac83xx {
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u8 fixme[0x2000];
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} tdmdmac83xx_t;
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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typedef struct immap {
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sysconf83xx_t sysconf; /* System configuration */
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wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */
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@ -666,7 +666,7 @@ typedef struct immap {
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u8 res7[0xC0000];
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} immap_t;
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#ifndef CONFIG_MPC834x
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#ifndef CONFIG_ARCH_MPC834X
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#ifdef CONFIG_HAS_FSL_MPH_USB
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#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */
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#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0
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@ -946,7 +946,7 @@ typedef struct immap {
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#endif
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#define CONFIG_SYS_MPC83xx_USB1_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET)
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define CONFIG_SYS_MPC83xx_USB2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET)
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#endif
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@ -13,7 +13,7 @@
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#if defined(CONFIG_ARCH_MPC8308) || \
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defined(CONFIG_ARCH_MPC8313) || \
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defined(CONFIG_ARCH_MPC8315) || \
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defined(CONFIG_MPC834x) || \
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defined(CONFIG_ARCH_MPC834X) || \
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defined(CONFIG_MPC837x)
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typedef struct spi8xxx {
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@ -359,7 +359,7 @@ int dm_pciauto_config_device(struct udevice *dev)
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PCI_DEV(dm_pci_get_bdf(dev)));
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break;
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#endif
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#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
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#if defined(CONFIG_ARCH_MPC834X) && !defined(CONFIG_VME8349)
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case PCI_CLASS_BRIDGE_OTHER:
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/*
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* The host/PCI bridge 1 seems broken in 8349 - it presents
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@ -376,7 +376,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
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PCI_DEV(dev));
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break;
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#endif
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#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
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#if defined(CONFIG_ARCH_MPC834X) && !defined(CONFIG_VME8349)
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case PCI_CLASS_BRIDGE_OTHER:
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/*
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* The host/PCI bridge 1 seems broken in 8349 - it presents
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@ -16,8 +16,6 @@
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* High Level Configuration Options
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_MPC834x 1 /* MPC834x family */
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#define CONFIG_MPC8349 1 /* MPC8349 specific */
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#define CONFIG_PCI_66M
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#ifdef CONFIG_PCI_66M
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@ -46,9 +46,6 @@
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */
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#define CONFIG_MPC8349 /* MPC8349 specific */
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#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */
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#define CONFIG_MISC_INIT_F
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* High Level Configuration Options
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_MPC834x 1 /* MPC834x specific */
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#define CONFIG_MPC8349 1 /* MPC8349 specific */
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/* IMMR Base Address Register, use Freescale default: 0xff400000 */
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#define CONFIG_SYS_IMMR 0xff400000
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@ -18,8 +18,6 @@
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* High Level Configuration Options
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_MPC834x 1 /* MPC834x family */
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#define CONFIG_MPC8349 1 /* MPC8349 specific */
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/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
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#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
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@ -28,8 +28,6 @@
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* High Level Configuration Options
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*/
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#define CONFIG_E300 1 /* E300 Family */
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#define CONFIG_MPC834x 1 /* MPC834x family */
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#define CONFIG_MPC8349 1 /* MPC8349 specific */
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#define CONFIG_VME8349 1 /* ESD VME8349 board specific */
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/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
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@ -55,7 +55,7 @@
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#define SPRIDR_PARTID 0xFFFF0000 /* Part Id */
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#define SPRIDR_REVID 0x0000FFFF /* Revision Id */
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define REVID_MAJOR(spridr) ((spridr & 0x0000FF00) >> 8)
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#define REVID_MINOR(spridr) (spridr & 0x000000FF)
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#else
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@ -108,7 +108,7 @@
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#define SPCR_COREPR 0x00300000
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#define SPCR_COREPR_SHIFT (31-11)
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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/* SPCR bits - MPC8349 specific */
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/* TSEC1 data priority */
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#define SPCR_TSEC1DP 0x00003000
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@ -145,7 +145,7 @@
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/* SICRL/H - System I/O Configuration Register Low/High
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*/
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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/* SICRL bits - MPC8349 specific */
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#define SICRL_LDP_A 0x80000000
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#define SICRL_USB1 0x40000000
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@ -720,7 +720,7 @@
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#define HRCWH_PCI_HOST_SHIFT 31
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#define HRCWH_PCI_AGENT 0x00000000
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define HRCWH_32_BIT_PCI 0x00000000
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#define HRCWH_64_BIT_PCI 0x40000000
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#endif
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@ -731,7 +731,7 @@
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#define HRCWH_PCI_ARBITER_DISABLE 0x00000000
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#define HRCWH_PCI_ARBITER_ENABLE 0x20000000
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define HRCWH_PCI2_ARBITER_DISABLE 0x00000000
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#define HRCWH_PCI2_ARBITER_ENABLE 0x10000000
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@ -755,7 +755,7 @@
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#define HRCWH_ROM_LOC_DDR_SDRAM 0x00000000
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#define HRCWH_ROM_LOC_PCI1 0x00100000
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define HRCWH_ROM_LOC_PCI2 0x00200000
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#endif
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#if defined(CONFIG_MPC837x)
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@ -790,7 +790,7 @@
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#define HRCWH_TSEC2M_IN_SGMII 0x00001800
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#endif
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#if defined(CONFIG_MPC834x)
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#if defined(CONFIG_ARCH_MPC834X)
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#define HRCWH_TSEC1M_IN_RGMII 0x00000000
|
||||
#define HRCWH_TSEC1M_IN_RTBI 0x00004000
|
||||
#define HRCWH_TSEC1M_IN_GMII 0x00008000
|
||||
@ -937,8 +937,8 @@
|
||||
#define SCCR_PCICM 0x00010000
|
||||
#define SCCR_PCICM_SHIFT 16
|
||||
|
||||
#if defined(CONFIG_MPC834x)
|
||||
/* SCCR bits - MPC834x specific */
|
||||
#if defined(CONFIG_ARCH_MPC834X)
|
||||
/* SCCR bits - MPC834X specific */
|
||||
#define SCCR_TSEC1CM 0xc0000000
|
||||
#define SCCR_TSEC1CM_SHIFT 30
|
||||
#define SCCR_TSEC1CM_0 0x00000000
|
||||
|
@ -147,7 +147,7 @@
|
||||
|
||||
#if defined(CONFIG_MPC83xx)
|
||||
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
|
||||
#if defined(CONFIG_MPC834x)
|
||||
#if defined(CONFIG_ARCH_MPC834X)
|
||||
#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
|
||||
#else
|
||||
#define CONFIG_SYS_FSL_USB2_ADDR 0
|
||||
|
@ -1223,9 +1223,7 @@ CONFIG_MONITOR_IS_IN_RAM
|
||||
CONFIG_MPC8313ERDB
|
||||
CONFIG_MPC8315ERDB
|
||||
CONFIG_MPC832XEMDS
|
||||
CONFIG_MPC8349
|
||||
CONFIG_MPC8349ITX
|
||||
CONFIG_MPC834x
|
||||
CONFIG_MPC8360
|
||||
CONFIG_MPC837XEMDS
|
||||
CONFIG_MPC837XERDB
|
||||
|
Loading…
Reference in New Issue
Block a user