microblaze: Add support for run time relocation
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing issues with function pointer arrays which need to be updated manually after relocation. Building code with -fPIC and linking with -pic will remove this limitation and there is no longer need to run manual update. By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC code will be compiled for full relocation. The patch does couple of things which are connected to each other. - Define STATIC_RELA dependency to call relocate-rela to fill sections. - REMAKE_ELF was already enabled but u-boot file can't be used because sections are empty. relocate-rela will fill them and output file is u-boot.elf which should be used. - Add support for full relocation (u-boot.elf) - Add support for early relocation when u-boot.bin is loaded to different address then CONFIG_SYS_TEXT_BASE - Add rela.dyn and dynsym sections Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original size (550kB to 608kB). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com
This commit is contained in:
Michal Simek
parent
034944b33b
commit
d58c007498
@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK
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config HAVE_ARCH_IOREMAP
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bool
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config NEEDS_MANUAL_RELOC
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bool
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config SYS_CACHE_SHIFT_4
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bool
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@ -76,7 +73,6 @@ config M68K
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config MICROBLAZE
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bool "MicroBlaze architecture"
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select NEEDS_MANUAL_RELOC
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select SUPPORT_OF_CONTROL
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imply CMD_IRQ
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@ -4,6 +4,9 @@ menu "M68000 architecture"
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config SYS_ARCH
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default "m68k"
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config NEEDS_MANUAL_RELOC
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def_bool y
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# processor family
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config MCF520x
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select OF_CONTROL
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@ -4,6 +4,20 @@ menu "MicroBlaze architecture"
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config SYS_ARCH
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default "microblaze"
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config NEEDS_MANUAL_RELOC
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bool "Disable position-independent pre-relocation code"
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default y
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help
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U-Boot expects to be linked to a specific hard-coded address, and to
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be loaded to and run from that address. This option lifts that
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restriction, thus allowing the code to be loaded to and executed from
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almost any 4K aligned address. This logic relies on the relocation
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information that is embedded in the binary to support U-Boot
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relocating itself to the top-of-RAM later during execution.
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config STATIC_RELA
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def_bool y if !NEEDS_MANUAL_RELOC
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choice
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prompt "Target select"
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optional
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@ -17,6 +17,11 @@ ifeq ($(CONFIG_SPL_BUILD),)
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PLATFORM_CPPFLAGS += -fPIC
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endif
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ifeq ($(CONFIG_STATIC_RELA),y)
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PLATFORM_CPPFLAGS += -fPIC
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LDFLAGS_u-boot += -pic
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endif
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ifeq ($(CONFIG_SYS_LITTLE_ENDIAN),y)
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PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblazeel
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else
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@ -6,4 +6,5 @@
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extra-y = start.o
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obj-y = irq.o
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obj-y += interrupts.o cache.o exception.o timer.o
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obj-$(CONFIG_STATIC_RELA) += relocate.o
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obj-$(CONFIG_SPL_BUILD) += spl.o
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111
arch/microblaze/cpu/relocate.c
Normal file
111
arch/microblaze/cpu/relocate.c
Normal file
@ -0,0 +1,111 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) Copyright 2022 Advanced Micro Devices, Inc
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <common.h>
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#include <elf.h>
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#define R_MICROBLAZE_NONE 0
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#define R_MICROBLAZE_32 1
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#define R_MICROBLAZE_REL 16
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#define R_MICROBLAZE_GLOB_DAT 18
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/**
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* mb_fix_rela - update relocation to new address
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* @reloc_addr: new relocation address
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* @verbose: enable version messages
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* @rela_start: rela section start
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* @rela_end: rela section end
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* @dyn_start: dynamic section start
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* @origin_addr: address where u-boot starts(doesn't need to be CONFIG_SYS_TEXT_BASE)
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*/
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void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
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u32 rela_end, u32 dyn_start, u32 origin_addr)
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{
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u32 num, type, mask, i, reloc_off;
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/*
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* Return in case u-boot.elf is used directly.
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* Skip it when u-boot.bin is loaded to different address than
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* CONFIG_SYS_TEXT_BASE. In this case relocation is necessary to run.
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*/
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if (reloc_addr == CONFIG_SYS_TEXT_BASE) {
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debug_cond(verbose,
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"Relocation address is the same - skip relocation\n");
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return;
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}
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reloc_off = reloc_addr - origin_addr;
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debug_cond(verbose, "Relocation address:\t0x%08x\n", reloc_addr);
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debug_cond(verbose, "Relocation offset:\t0x%08x\n", reloc_off);
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debug_cond(verbose, "Origin address:\t0x%08x\n", origin_addr);
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debug_cond(verbose, "Rela start:\t0x%08x\n", rela_start);
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debug_cond(verbose, "Rela end:\t0x%08x\n", rela_end);
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debug_cond(verbose, "Dynsym start:\t0x%08x\n", dyn_start);
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num = (rela_end - rela_start) / sizeof(Elf32_Rela);
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debug_cond(verbose, "Number of entries:\t%u\n", num);
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for (i = 0; i < num; i++) {
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Elf32_Rela *rela;
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u32 temp;
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rela = (Elf32_Rela *)(rela_start + sizeof(Elf32_Rela) * i);
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mask = 0xffULL; /* would be different on 32-bit */
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type = rela->r_info & mask;
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debug_cond(verbose, "\nRela possition:\t%d/0x%x\n",
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i, (u32)rela);
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switch (type) {
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case R_MICROBLAZE_REL:
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temp = *(u32 *)rela->r_offset;
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debug_cond(verbose, "Type:\tREL\n");
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debug_cond(verbose, "Rela r_offset:\t\t0x%x\n", rela->r_offset);
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debug_cond(verbose, "Rela r_info:\t\t0x%x\n", rela->r_info);
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debug_cond(verbose, "Rela r_addend:\t\t0x%x\n", rela->r_addend);
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debug_cond(verbose, "Value at r_offset:\t0x%x\n", temp);
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rela->r_offset += reloc_off;
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rela->r_addend += reloc_off;
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temp = *(u32 *)rela->r_offset;
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temp += reloc_off;
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*(u32 *)rela->r_offset = temp;
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debug_cond(verbose, "New:Rela r_offset:\t0x%x\n", rela->r_offset);
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debug_cond(verbose, "New:Rela r_addend:\t0x%x\n", rela->r_addend);
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debug_cond(verbose, "New:Value at r_offset:\t0x%x\n", temp);
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break;
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case R_MICROBLAZE_32:
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case R_MICROBLAZE_GLOB_DAT:
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debug_cond(verbose, "Type:\t(32/GLOB) %u\n", type);
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debug_cond(verbose, "Rela r_offset:\t\t0x%x\n", rela->r_offset);
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debug_cond(verbose, "Rela r_info:\t\t0x%x\n", rela->r_info);
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debug_cond(verbose, "Rela r_addend:\t\t0x%x\n", rela->r_addend);
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debug_cond(verbose, "Value at r_offset:\t0x%x\n", temp);
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rela->r_offset += reloc_off;
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temp = *(u32 *)rela->r_offset;
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temp += reloc_off;
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*(u32 *)rela->r_offset = temp;
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debug_cond(verbose, "New:Rela r_offset:\t0x%x\n", rela->r_offset);
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debug_cond(verbose, "New:Value at r_offset:\t0x%x\n", temp);
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break;
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case R_MICROBLAZE_NONE:
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debug_cond(verbose, "R_MICROBLAZE_NONE - skip\n");
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break;
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default:
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debug_cond(verbose, "warning: unsupported relocation type %d at %x\n",
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type, rela->r_offset);
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}
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}
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}
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@ -10,8 +10,16 @@
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#include <asm-offsets.h>
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#include <config.h>
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#if defined(CONFIG_STATIC_RELA)
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#define SYM_ADDR(reg, reg_add, symbol) \
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mfs r20, rpc; \
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addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \
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lwi reg, r20, symbol@GOT; \
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addk reg, reg reg_add;
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#else
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#define SYM_ADDR(reg, reg_add, symbol) \
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addi reg, reg_add, symbol
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#endif
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.text
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.global _start
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@ -27,6 +35,39 @@ _start:
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addi r1, r0, CONFIG_SPL_STACK_ADDR
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#else
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add r1, r0, r20
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#if defined(CONFIG_STATIC_RELA)
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bri 1f
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/* Force alignment for easier ASM code below */
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#define ALIGNMENT_ADDR 0x20
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.align 4
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uboot_dyn_start:
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.word __rel_dyn_start
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uboot_dyn_end:
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.word __rel_dyn_end
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uboot_sym_start:
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.word __dyn_sym_start
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1:
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addi r5, r20, 0
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add r6, r0, r0
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lwi r7, r20, ALIGNMENT_ADDR
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addi r7, r7, -CONFIG_SYS_TEXT_BASE
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add r7, r7, r5
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lwi r8, r20, ALIGNMENT_ADDR + 0x4
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addi r8, r8, -CONFIG_SYS_TEXT_BASE
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add r8, r8, r5
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lwi r9, r20, ALIGNMENT_ADDR + 0x8
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addi r9, r9, -CONFIG_SYS_TEXT_BASE
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add r9, r9, r5
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addi r10, r0, CONFIG_SYS_TEXT_BASE
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brlid r15, mb_fix_rela
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nop
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#endif
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#endif
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addi r1, r1, -4 /* Decrement SP to top of memory */
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@ -297,6 +338,30 @@ relocate_code:
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brlid r15, __setup_exceptions
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nop
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#if defined(CONFIG_STATIC_RELA)
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/* reloc_offset is current location */
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SYM_ADDR(r10, r0, _start)
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/* r5 new address where I should copy code */
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add r5, r0, r7 /* Move reloc addr to r5 */
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/* Verbose message */
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addi r6, r0, 0
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SYM_ADDR(r7, r0, __rel_dyn_start)
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rsub r7, r10, r7
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add r7, r7, r5
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SYM_ADDR(r8, r0, __rel_dyn_end)
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rsub r8, r10, r8
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add r8, r8, r5
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SYM_ADDR(r9, r0, __dyn_sym_start)
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rsub r9, r10, r9
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add r9, r9, r5
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brlid r15, mb_fix_rela
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nop
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/* end of code which does relocation */
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#else
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/* Check if GOT exist */
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addik r21, r23, _got_start
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addik r22, r23, _got_end
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@ -314,6 +379,7 @@ relocate_code:
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cmpu r12, r21, r22 /* Check if this cross boundary */
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bneid r12, 3b
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addik r21. r21, 4
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#endif
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/* Flush caches to ensure consistency */
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addik r5, r0, 0
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@ -46,6 +46,20 @@ SECTIONS
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}
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__init_end = . ;
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. = ALIGN(4);
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__rel_dyn_start = .;
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.rela.dyn : {
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*(.rela.dyn)
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}
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__rel_dyn_end = .;
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. = ALIGN(4);
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__dyn_sym_start = .;
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.dynsym : {
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*(.dynsym)
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}
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__dyn_sym_end = .;
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.bss ALIGN(0x4):
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{
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__bss_start = .;
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@ -684,6 +684,8 @@ static int setup_reloc(void)
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#ifdef CONFIG_SYS_TEXT_BASE
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#ifdef ARM
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gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
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#elif defined(CONFIG_MICROBLAZE)
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gd->reloc_off = gd->relocaddr - (u32)_start;
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#elif defined(CONFIG_M68K)
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/*
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* On all ColdFire arch cpu, monitor code starts always
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