dt-bindings: pinctrl: stm32: add new entry for package information
Add "st,package" entry. Possibles values are: -STM32MP_PKG_AA for LFBGA448 (18*18) package -STM32MP_PKG_AB for LFBGA354 (16*16) package -STM32MP_PKG_AC for TFBGA361 (12*12) package -STM32MP_PKG_AD for TFBGA257 (10*10) package see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416 for v5.2-rc1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Patrick Delaunay
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@ -8,8 +8,13 @@ controllers onto these pads.
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Pin controller node:
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Required properies:
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- compatible: value should be one of the following:
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(a) "st,stm32f429-pinctrl"
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(b) "st,stm32f746-pinctrl"
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"st,stm32f429-pinctrl"
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"st,stm32f469-pinctrl"
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"st,stm32f746-pinctrl"
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"st,stm32f769-pinctrl"
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"st,stm32h743-pinctrl"
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"st,stm32mp157-pinctrl"
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"st,stm32mp157-z-pinctrl"
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- #address-cells: The value of this property must be 1
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- #size-cells : The value of this property must be 1
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- ranges : defines mapping between pin controller node (parent) to
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@ -32,13 +37,30 @@ Required properties:
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Optional properties:
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- reset: : Reference to the reset controller
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- interrupt-parent: phandle of the interrupt parent to which the external
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GPIO interrupts are forwarded to.
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- st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
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which includes IRQ mux selection register, and the offset of the IRQ mux
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selection register.
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- st,syscfg: Should be phandle/offset/mask.
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-The phandle to the syscon node which includes IRQ mux selection register.
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-The offset of the IRQ mux selection register
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-The field mask of IRQ mux, needed if different of 0xf.
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- gpio-ranges: Define a dedicated mapping between a pin-controller and
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a gpio controller. Format is <&phandle a b c> with:
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-(phandle): phandle of pin-controller.
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-(a): gpio base offset in range.
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-(b): pin base offset in range.
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-(c): gpio count in range
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This entry has to be used either if there are holes inside a bank:
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GPIOB0/B1/B2/B14/B15 (see example 2)
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or if banks are not contiguous:
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GPIOA/B/C/E...
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NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller
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have to use a "gpio-ranges" entry.
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More details in Documentation/devicetree/bindings/gpio/gpio.txt.
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- st,bank-ioport: should correspond to the EXTI IOport selection (EXTI line
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used to select GPIOs as interrupts).
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- hwlocks: reference to a phandle of a hardware spinlock provider node.
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- st,package: Indicates the SOC package used.
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More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
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Example:
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Example 1:
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#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
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...
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@ -60,6 +82,43 @@ Example:
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pin-functions nodes follow...
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};
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Example 2:
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#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
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...
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pinctrl: pin-controller {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stm32f429-pinctrl";
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ranges = <0 0x40020000 0x3000>;
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pins-are-numbered;
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gpioa: gpio@40020000 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x0 0x400>;
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resets = <&reset_ahb1 0>;
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st,bank-name = "GPIOA";
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gpio-ranges = <&pinctrl 0 0 16>;
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};
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gpiob: gpio@40020400 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x0 0x400>;
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resets = <&reset_ahb1 0>;
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st,bank-name = "GPIOB";
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ngpios = 4;
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gpio-ranges = <&pinctrl 0 16 3>,
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<&pinctrl 14 30 2>;
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};
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...
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pin-functions nodes follow...
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};
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Contents of function subnode node:
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----------------------------------
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Subnode format
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@ -83,14 +142,31 @@ Required properties:
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- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
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- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
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- function: The function number, can be:
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* 0 : GPIO IN
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* 0 : GPIO
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* 1 : Alternate Function 0
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* 2 : Alternate Function 1
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* 3 : Alternate Function 2
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* ...
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* 16 : Alternate Function 15
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* 17 : Analog
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* 18 : GPIO OUT
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To simplify the usage, macro is available to generate "pinmux" field.
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This macro is available here:
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- include/dt-bindings/pinctrl/stm32-pinfunc.h
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Some examples of using macro:
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/* GPIO A9 set as alernate function 2 */
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... {
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pinmux = <STM32_PINMUX('A', 9, AF2)>;
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};
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/* GPIO A9 set as GPIO */
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... {
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pinmux = <STM32_PINMUX('A', 9, GPIO)>;
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};
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/* GPIO A9 set as analog */
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... {
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pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
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};
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Optional properties:
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- GENERIC_PINCONFIG: is the generic pinconfig options to use.
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@ -114,13 +190,13 @@ pin-controller {
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...
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usart1_pins_a: usart1@0 {
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pins1 {
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pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
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pinmux = <STM32_PINMUX('A', 9, AF7)>;
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
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pinmux = <STM32_PINMUX('A', 10, AF7)>;
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bias-disable;
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};
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};
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@ -129,5 +205,4 @@ pin-controller {
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&usart1 {
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pinctrl-0 = <&usart1_pins_a>;
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pinctrl-names = "default";
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status = "okay";
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};
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@ -32,5 +32,11 @@
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#define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode))
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/* package information */
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#define STM32MP_PKG_AA 0x1
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#define STM32MP_PKG_AB 0x2
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#define STM32MP_PKG_AC 0x4
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#define STM32MP_PKG_AD 0x8
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#endif /* _DT_BINDINGS_STM32_PINFUNC_H */
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